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author | Nico Huber <nico.huber@secunet.com> | 2019-07-03 15:48:54 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-02 06:24:33 +0000 |
commit | bc2c12c72834a5b24fadd13d24df93298199dda1 (patch) | |
tree | 8e2f928012a4ca3c004015746b8636aaa3424d7f /src/mainboard/up/squared/bootblock.c | |
parent | 5c9d82bd7337a73f67c7ca83d0d7489e636d1b7b (diff) |
libpayload/x86: Try to discover invariant TSC rate
We can skip the PIT-based TSC calibration if we can derive the invariant
TSC rate from CPUID/MSR data. This is necessary if the PIT is disabled,
which is the default, for instance, on Coffee Lake CPUs.
This implementation should cover all Intel Core i processors at least.
For older processors, we fall back to the PIT calibration.
Change-Id: Ic6607ee2a8b41c2be9dc1bb4f1e23e652bb33889
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34170
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/up/squared/bootblock.c')
0 files changed, 0 insertions, 0 deletions