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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-10-21 14:19:04 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-12-03 08:11:03 +0100
commit1aa35c6f6c2f3d3820d574579e929cbafd4304a7 (patch)
treee7f6a20ca94317095c8eea789ff8d380f5be5a11 /src/mainboard/tyan
parentb139b5efcc7f1caf541156fa8d213e3eaf231603 (diff)
AGESA: Trace execution with AGESA_EVENTLOG()
Change-Id: I5601ed92ca808603b0a9edad118ca54aa168aceb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7604 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/tyan')
-rw-r--r--src/mainboard/tyan/s8226/romstage.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c
index a0e8bfd33d..8587ed1797 100644
--- a/src/mainboard/tyan/s8226/romstage.c
+++ b/src/mainboard/tyan/s8226/romstage.c
@@ -28,7 +28,6 @@
#include "cpu/x86/lapic.h"
#include <cpu/amd/car.h>
#include <northbridge/amd/agesa/agesawrapper.h>
-#include <northbridge/amd/agesa/agesawrapper_call.h>
#include "northbridge/amd/agesa/family10/reset_test.h"
#include <nb_cimx.h>
#include <sb_cimx.h>
@@ -44,7 +43,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
u32 val;
post_code(0x30);
- AGESAWRAPPER_PRE_CONSOLE(amdinitmmio);
+ agesawrapper_amdinitmmio();
post_code(0x31);
/* For serial port. */
@@ -69,7 +68,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
post_code(0x37);
- AGESAWRAPPER(amdinitreset);
+ agesawrapper_amdinitreset();
if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x38);
@@ -84,7 +83,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
sb_Poweron_Init();
}
post_code(0x3B);
- AGESAWRAPPER(amdinitearly);
+ agesawrapper_amdinitearly();
post_code(0x3C);
/* W83627DHG pin89,90 function select is RSTOUT3#, RSTOUT2# by default.
@@ -104,10 +103,10 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
post_code(0x40);
- AGESAWRAPPER(amdinitpost);
+ agesawrapper_amdinitpost();
post_code(0x41);
- AGESAWRAPPER(amdinitenv);
+ agesawrapper_amdinitenv();
post_code(0x42);
post_code(0x50);