diff options
author | Sven Schnelle <svens@stackframe.org> | 2011-03-01 19:58:47 +0000 |
---|---|---|
committer | Sven Schnelle <svens@stackframe.org> | 2011-03-01 19:58:47 +0000 |
commit | 91321028ec3fac017e8e2c47ec5fe7742409b3b0 (patch) | |
tree | 738f9e0d9f124ef4670c5e21516695fc63fc6d46 /src/mainboard/tyan | |
parent | 270a908646273461b41e591739d778d3d675ff6f (diff) |
Use subsystem id from devicetree.cb instead of Kconfig and move
all boards to the new config scheme.
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6421 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan')
29 files changed, 14 insertions, 60 deletions
diff --git a/src/mainboard/tyan/Kconfig b/src/mainboard/tyan/Kconfig index 6af48a2d8e..01e4f35e99 100644 --- a/src/mainboard/tyan/Kconfig +++ b/src/mainboard/tyan/Kconfig @@ -74,8 +74,4 @@ config MAINBOARD_VENDOR string default "Tyan" -config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID - hex - default 0x10f1 - endif # VENDOR_TYAN diff --git a/src/mainboard/tyan/s2735/Kconfig b/src/mainboard/tyan/s2735/Kconfig index e1f475b9ba..4aafa3c05d 100644 --- a/src/mainboard/tyan/s2735/Kconfig +++ b/src/mainboard/tyan/s2735/Kconfig @@ -45,8 +45,4 @@ config MAX_PHYSICAL_CPUS int default 2 -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2735 - endif # BOARD_TYAN_S2735 diff --git a/src/mainboard/tyan/s2735/devicetree.cb b/src/mainboard/tyan/s2735/devicetree.cb index b519a4ad72..c0557f8d18 100644 --- a/src/mainboard/tyan/s2735/devicetree.cb +++ b/src/mainboard/tyan/s2735/devicetree.cb @@ -1,5 +1,6 @@ chip northbridge/intel/e7501 device pci_domain 0 on + subsystemid 0x10f1 0x2735 inherit device pci 0.0 on end device pci 0.1 on end device pci 2.0 on diff --git a/src/mainboard/tyan/s2850/Kconfig b/src/mainboard/tyan/s2850/Kconfig index ab5897a619..c5559515f5 100644 --- a/src/mainboard/tyan/s2850/Kconfig +++ b/src/mainboard/tyan/s2850/Kconfig @@ -23,10 +23,6 @@ config MAINBOARD_PART_NUMBER string default "S2850" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2850 - config MAX_CPUS int default 2 diff --git a/src/mainboard/tyan/s2850/devicetree.cb b/src/mainboard/tyan/s2850/devicetree.cb index 6a9a420724..4e981ad0d7 100644 --- a/src/mainboard/tyan/s2850/devicetree.cb +++ b/src/mainboard/tyan/s2850/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2850 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT0 # devices on link 2, link 2 == LDT 2 diff --git a/src/mainboard/tyan/s2875/Kconfig b/src/mainboard/tyan/s2875/Kconfig index 89a11772ce..56c37236e5 100644 --- a/src/mainboard/tyan/s2875/Kconfig +++ b/src/mainboard/tyan/s2875/Kconfig @@ -25,10 +25,6 @@ config MAINBOARD_PART_NUMBER string default "S2875" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2875 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2875/devicetree.cb b/src/mainboard/tyan/s2875/devicetree.cb index d3c2582fc0..d3d6c6d14e 100644 --- a/src/mainboard/tyan/s2875/devicetree.cb +++ b/src/mainboard/tyan/s2875/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2875 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2880/Kconfig b/src/mainboard/tyan/s2880/Kconfig index a98ec0628c..87ec6cab49 100644 --- a/src/mainboard/tyan/s2880/Kconfig +++ b/src/mainboard/tyan/s2880/Kconfig @@ -33,10 +33,6 @@ config MAINBOARD_PART_NUMBER string default "S2880" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2880 - config MAX_CPUS int default 2 diff --git a/src/mainboard/tyan/s2880/devicetree.cb b/src/mainboard/tyan/s2880/devicetree.cb index ba43b274b9..b815fb5f1b 100644 --- a/src/mainboard/tyan/s2880/devicetree.cb +++ b/src/mainboard/tyan/s2880/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2880 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2881/Kconfig b/src/mainboard/tyan/s2881/Kconfig index 81a349d7b6..fd5fca883c 100644 --- a/src/mainboard/tyan/s2881/Kconfig +++ b/src/mainboard/tyan/s2881/Kconfig @@ -35,10 +35,6 @@ config MAINBOARD_PART_NUMBER string default "S2881" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2881 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb index 24224598ca..7e836ffe56 100644 --- a/src/mainboard/tyan/s2881/devicetree.cb +++ b/src/mainboard/tyan/s2881/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2881 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # link 0 device pci 18.0 on end # link 1 diff --git a/src/mainboard/tyan/s2882/Kconfig b/src/mainboard/tyan/s2882/Kconfig index 00e813acc1..c6711b3fe4 100644 --- a/src/mainboard/tyan/s2882/Kconfig +++ b/src/mainboard/tyan/s2882/Kconfig @@ -34,10 +34,6 @@ config MAINBOARD_PART_NUMBER string default "S2882" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2882 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2882/devicetree.cb b/src/mainboard/tyan/s2882/devicetree.cb index b8f2160928..4f10752d8c 100644 --- a/src/mainboard/tyan/s2882/devicetree.cb +++ b/src/mainboard/tyan/s2882/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex end device pci_domain 0 on + subsystemid 0x10f1 0x2882 inherit chip northbridge/amd/amdk8 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 diff --git a/src/mainboard/tyan/s2885/Kconfig b/src/mainboard/tyan/s2885/Kconfig index 03a5952a0d..f4a6f490f0 100644 --- a/src/mainboard/tyan/s2885/Kconfig +++ b/src/mainboard/tyan/s2885/Kconfig @@ -35,10 +35,6 @@ config MAINBOARD_PART_NUMBER string default "S2885" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2885 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2885/devicetree.cb b/src/mainboard/tyan/s2885/devicetree.cb index 0eb1b9e002..fbb96807d6 100644 --- a/src/mainboard/tyan/s2885/devicetree.cb +++ b/src/mainboard/tyan/s2885/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x2885 inherit chip northbridge/amd/amdk8 device pci 18.0 on # LDT0 chip southbridge/amd/amd8151 diff --git a/src/mainboard/tyan/s2891/Kconfig b/src/mainboard/tyan/s2891/Kconfig index 31e99b6372..2848380ef2 100644 --- a/src/mainboard/tyan/s2891/Kconfig +++ b/src/mainboard/tyan/s2891/Kconfig @@ -36,10 +36,6 @@ config MAINBOARD_PART_NUMBER string default "S2891" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2891 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2891/devicetree.cb b/src/mainboard/tyan/s2891/devicetree.cb index 73034b10b9..d793640587 100644 --- a/src/mainboard/tyan/s2891/devicetree.cb +++ b/src/mainboard/tyan/s2891/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2891 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge diff --git a/src/mainboard/tyan/s2892/Kconfig b/src/mainboard/tyan/s2892/Kconfig index df3430b607..88703f38b6 100644 --- a/src/mainboard/tyan/s2892/Kconfig +++ b/src/mainboard/tyan/s2892/Kconfig @@ -35,10 +35,6 @@ config MAINBOARD_PART_NUMBER string default "S2892" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2892 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2892/devicetree.cb b/src/mainboard/tyan/s2892/devicetree.cb index b84c04115a..3b999ca42e 100644 --- a/src/mainboard/tyan/s2892/devicetree.cb +++ b/src/mainboard/tyan/s2892/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2892 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge diff --git a/src/mainboard/tyan/s2895/Kconfig b/src/mainboard/tyan/s2895/Kconfig index 0f8482be2e..f35ea82774 100644 --- a/src/mainboard/tyan/s2895/Kconfig +++ b/src/mainboard/tyan/s2895/Kconfig @@ -40,10 +40,6 @@ config MAINBOARD_PART_NUMBER string default "S2895" -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2895 - config MAX_CPUS int default 4 diff --git a/src/mainboard/tyan/s2895/devicetree.cb b/src/mainboard/tyan/s2895/devicetree.cb index 7841a0e43c..7d7abc3dd1 100644 --- a/src/mainboard/tyan/s2895/devicetree.cb +++ b/src/mainboard/tyan/s2895/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2895 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge diff --git a/src/mainboard/tyan/s2912/Kconfig b/src/mainboard/tyan/s2912/Kconfig index 466cb4a889..811e9a7a1b 100644 --- a/src/mainboard/tyan/s2912/Kconfig +++ b/src/mainboard/tyan/s2912/Kconfig @@ -79,10 +79,6 @@ config SERIAL_CPU_INIT bool default n -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2912 - config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/tyan/s2912/devicetree.cb b/src/mainboard/tyan/s2912/devicetree.cb index 11c6a733bb..0ce4a4895b 100644 --- a/src/mainboard/tyan/s2912/devicetree.cb +++ b/src/mainboard/tyan/s2912/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2912 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig index 58cdb9c83c..d7d5114507 100644 --- a/src/mainboard/tyan/s2912_fam10/Kconfig +++ b/src/mainboard/tyan/s2912_fam10/Kconfig @@ -80,10 +80,6 @@ config SERIAL_CPU_INIT bool default n -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x2912 - config IRQ_SLOT_COUNT int default 11 diff --git a/src/mainboard/tyan/s2912_fam10/devicetree.cb b/src/mainboard/tyan/s2912_fam10/devicetree.cb index 8373ffc344..43bdeb63de 100644 --- a/src/mainboard/tyan/s2912_fam10/devicetree.cb +++ b/src/mainboard/tyan/s2912_fam10/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex end end device pci_domain 0 on # PCI domain + subsystemid 0x10f1 0x2912 inherit chip northbridge/amd/amdfam10 # Northbridge / RAM controller device pci 18.0 on end device pci 18.0 on end diff --git a/src/mainboard/tyan/s4880/Kconfig b/src/mainboard/tyan/s4880/Kconfig index 5147b979a6..0b425b9c80 100644 --- a/src/mainboard/tyan/s4880/Kconfig +++ b/src/mainboard/tyan/s4880/Kconfig @@ -65,8 +65,4 @@ config IRQ_SLOT_COUNT int default 22 -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x4880 - endif # BOARD_TYAN_S4880 diff --git a/src/mainboard/tyan/s4880/devicetree.cb b/src/mainboard/tyan/s4880/devicetree.cb index cb342357a1..e1aa23a35e 100644 --- a/src/mainboard/tyan/s4880/devicetree.cb +++ b/src/mainboard/tyan/s4880/devicetree.cb @@ -6,6 +6,7 @@ chip northbridge/amd/amdk8/root_complex end device pci_domain 0 on + subsystemid 0x10f1 0x4880 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT0 device pci 18.0 on end # LDT1 diff --git a/src/mainboard/tyan/s4882/Kconfig b/src/mainboard/tyan/s4882/Kconfig index b0d8897af6..3aa1690262 100644 --- a/src/mainboard/tyan/s4882/Kconfig +++ b/src/mainboard/tyan/s4882/Kconfig @@ -65,8 +65,4 @@ config IRQ_SLOT_COUNT int default 22 -config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID - hex - default 0x4882 - endif # BOARD_TYAN_S4882 diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb index d4a7017f43..767def9ac5 100644 --- a/src/mainboard/tyan/s4882/devicetree.cb +++ b/src/mainboard/tyan/s4882/devicetree.cb @@ -5,6 +5,7 @@ chip northbridge/amd/amdk8/root_complex end end device pci_domain 0 on + subsystemid 0x10f1 0x4882 inherit chip northbridge/amd/amdk8 device pci 18.0 on end # LDT0 device pci 18.0 on # northbridge |