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authorStefan Reinauer <reinauer@chromium.org>2013-02-12 14:17:15 -0800
committerRonald G. Minnich <rminnich@gmail.com>2013-02-14 02:00:10 +0100
commit4aff4458f58398f54c248604694c7005294c1747 (patch)
treeeb3d9259255abc486a4d6d9eb53199b4d408053e /src/mainboard/tyan
parentdc8259ce1d2e866f3133da49c1d6f4773f5698c1 (diff)
sconfig: rename pci_domain -> domain
The name pci_domain was a bit misleading, since the construct is only PCI specific in a particular (northbridge/cpu) implementation, but not by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-PCI systems without adding new keywords. Change-Id: Ide885a1d5e15d37560c79b936a39252150560e85 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2376 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/tyan')
-rw-r--r--src/mainboard/tyan/s1846/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s2735/devicetree.cb4
-rw-r--r--src/mainboard/tyan/s2850/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s2875/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s2880/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s2881/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s2882/devicetree.cb4
-rw-r--r--src/mainboard/tyan/s2885/devicetree.cb4
-rw-r--r--src/mainboard/tyan/s2891/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s2892/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s2895/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s2912/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s2912_fam10/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s4880/devicetree.cb4
-rw-r--r--src/mainboard/tyan/s4882/devicetree.cb2
-rw-r--r--src/mainboard/tyan/s8226/devicetree.cb4
16 files changed, 21 insertions, 21 deletions
diff --git a/src/mainboard/tyan/s1846/devicetree.cb b/src/mainboard/tyan/s1846/devicetree.cb
index d3df17c7bb..16b3e7c214 100644
--- a/src/mainboard/tyan/s1846/devicetree.cb
+++ b/src/mainboard/tyan/s1846/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/intel/i440bx # Northbridge
device lapic 0 on end # APIC
end
end
- device pci_domain 0 on # PCI domain
+ device domain 0 on # PCI domain
device pci 0.0 on end # Host bridge
device pci 1.0 on end # PCI/AGP bridge
chip southbridge/intel/i82371eb # Southbridge
diff --git a/src/mainboard/tyan/s2735/devicetree.cb b/src/mainboard/tyan/s2735/devicetree.cb
index c0557f8d18..726a5d2c76 100644
--- a/src/mainboard/tyan/s2735/devicetree.cb
+++ b/src/mainboard/tyan/s2735/devicetree.cb
@@ -1,5 +1,5 @@
chip northbridge/intel/e7501
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x10f1 0x2735 inherit
device pci 0.0 on end
device pci 0.1 on end
@@ -73,7 +73,7 @@ chip northbridge/intel/e7501
device pci 1f.5 off end
device pci 1f.6 off end
end # SB
- end # PCI_DOMAIN
+ end # PCI domain
device lapic_cluster 0 on
chip cpu/intel/socket_mPGA604
device lapic 0 on end
diff --git a/src/mainboard/tyan/s2850/devicetree.cb b/src/mainboard/tyan/s2850/devicetree.cb
index 4e981ad0d7..bff001305d 100644
--- a/src/mainboard/tyan/s2850/devicetree.cb
+++ b/src/mainboard/tyan/s2850/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex
device lapic 0 on end
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x10f1 0x2850 inherit
chip northbridge/amd/amdk8
device pci 18.0 on # LDT0
diff --git a/src/mainboard/tyan/s2875/devicetree.cb b/src/mainboard/tyan/s2875/devicetree.cb
index d3d6c6d14e..f7f7a9e6e3 100644
--- a/src/mainboard/tyan/s2875/devicetree.cb
+++ b/src/mainboard/tyan/s2875/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex
device lapic 0 on end
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x10f1 0x2875 inherit
chip northbridge/amd/amdk8
device pci 18.0 on # northbridge
diff --git a/src/mainboard/tyan/s2880/devicetree.cb b/src/mainboard/tyan/s2880/devicetree.cb
index b815fb5f1b..2aa0796877 100644
--- a/src/mainboard/tyan/s2880/devicetree.cb
+++ b/src/mainboard/tyan/s2880/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex
device lapic 0 on end
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x10f1 0x2880 inherit
chip northbridge/amd/amdk8
device pci 18.0 on # northbridge
diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb
index 7e836ffe56..463c553982 100644
--- a/src/mainboard/tyan/s2881/devicetree.cb
+++ b/src/mainboard/tyan/s2881/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex
device lapic 0 on end
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x10f1 0x2881 inherit
chip northbridge/amd/amdk8
device pci 18.0 on end # link 0
diff --git a/src/mainboard/tyan/s2882/devicetree.cb b/src/mainboard/tyan/s2882/devicetree.cb
index 4f10752d8c..0726d08c49 100644
--- a/src/mainboard/tyan/s2882/devicetree.cb
+++ b/src/mainboard/tyan/s2882/devicetree.cb
@@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x10f1 0x2882 inherit
chip northbridge/amd/amdk8
device pci 18.0 on # northbridge
@@ -121,6 +121,6 @@ chip northbridge/amd/amdk8/root_complex
device pci 18.2 on end
device pci 18.3 on end
end # NB
- end #pci_domain
+ end #domain
end
diff --git a/src/mainboard/tyan/s2885/devicetree.cb b/src/mainboard/tyan/s2885/devicetree.cb
index fbb96807d6..b677fbc2e9 100644
--- a/src/mainboard/tyan/s2885/devicetree.cb
+++ b/src/mainboard/tyan/s2885/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex
device lapic 0 on end
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x10f1 0x2885 inherit
chip northbridge/amd/amdk8
device pci 18.0 on # LDT0
@@ -118,7 +118,7 @@ chip northbridge/amd/amdk8/root_complex
device pci 18.3 on end
end
- end #pci_domain
+ end #domain
# chip drivers/generic/debug
# device pnp 0.0 off end
diff --git a/src/mainboard/tyan/s2891/devicetree.cb b/src/mainboard/tyan/s2891/devicetree.cb
index d793640587..7517e4d774 100644
--- a/src/mainboard/tyan/s2891/devicetree.cb
+++ b/src/mainboard/tyan/s2891/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
device lapic 0 on end # Local APIC of the CPU
end
end
- device pci_domain 0 on # PCI domain
+ device domain 0 on # PCI domain
subsystemid 0x10f1 0x2891 inherit
chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on # Link 0 == LDT 0
diff --git a/src/mainboard/tyan/s2892/devicetree.cb b/src/mainboard/tyan/s2892/devicetree.cb
index 3b999ca42e..a5cef447ef 100644
--- a/src/mainboard/tyan/s2892/devicetree.cb
+++ b/src/mainboard/tyan/s2892/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
device lapic 0 on end # Local APIC of the CPU
end
end
- device pci_domain 0 on # PCI domain
+ device domain 0 on # PCI domain
subsystemid 0x10f1 0x2892 inherit
chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on # Link 0 == LDT 0
diff --git a/src/mainboard/tyan/s2895/devicetree.cb b/src/mainboard/tyan/s2895/devicetree.cb
index 7d7abc3dd1..f60d5c6658 100644
--- a/src/mainboard/tyan/s2895/devicetree.cb
+++ b/src/mainboard/tyan/s2895/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
device lapic 0 on end # Local APIC of the CPU
end
end
- device pci_domain 0 on # PCI domain
+ device domain 0 on # PCI domain
subsystemid 0x10f1 0x2895 inherit
chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on # Link 0 == LDT 0
diff --git a/src/mainboard/tyan/s2912/devicetree.cb b/src/mainboard/tyan/s2912/devicetree.cb
index 0ce4a4895b..276e12f01e 100644
--- a/src/mainboard/tyan/s2912/devicetree.cb
+++ b/src/mainboard/tyan/s2912/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
device lapic 0 on end # Local APIC of the CPU
end
end
- device pci_domain 0 on # PCI domain
+ device domain 0 on # PCI domain
subsystemid 0x10f1 0x2912 inherit
chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on end
diff --git a/src/mainboard/tyan/s2912_fam10/devicetree.cb b/src/mainboard/tyan/s2912_fam10/devicetree.cb
index 43bdeb63de..851da920f1 100644
--- a/src/mainboard/tyan/s2912_fam10/devicetree.cb
+++ b/src/mainboard/tyan/s2912_fam10/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdfam10/root_complex # Root complex
device lapic 0 on end # Local APIC of the CPU
end
end
- device pci_domain 0 on # PCI domain
+ device domain 0 on # PCI domain
subsystemid 0x10f1 0x2912 inherit
chip northbridge/amd/amdfam10 # Northbridge / RAM controller
device pci 18.0 on end
diff --git a/src/mainboard/tyan/s4880/devicetree.cb b/src/mainboard/tyan/s4880/devicetree.cb
index e1aa23a35e..37470d8299 100644
--- a/src/mainboard/tyan/s4880/devicetree.cb
+++ b/src/mainboard/tyan/s4880/devicetree.cb
@@ -5,7 +5,7 @@ chip northbridge/amd/amdk8/root_complex
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x10f1 0x4880 inherit
chip northbridge/amd/amdk8
device pci 18.0 on end # LDT0
@@ -94,6 +94,6 @@ chip northbridge/amd/amdk8/root_complex
device pci 18.3 on end
end
- end #pci_domain
+ end #domain
end
diff --git a/src/mainboard/tyan/s4882/devicetree.cb b/src/mainboard/tyan/s4882/devicetree.cb
index 767def9ac5..eaf2e57b08 100644
--- a/src/mainboard/tyan/s4882/devicetree.cb
+++ b/src/mainboard/tyan/s4882/devicetree.cb
@@ -4,7 +4,7 @@ chip northbridge/amd/amdk8/root_complex
device lapic 0 on end
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x10f1 0x4882 inherit
chip northbridge/amd/amdk8
device pci 18.0 on end # LDT0
diff --git a/src/mainboard/tyan/s8226/devicetree.cb b/src/mainboard/tyan/s8226/devicetree.cb
index a057f027e7..ce367a83de 100644
--- a/src/mainboard/tyan/s8226/devicetree.cb
+++ b/src/mainboard/tyan/s8226/devicetree.cb
@@ -22,7 +22,7 @@ chip northbridge/amd/agesa/family15/root_complex
device lapic 0x10 on end
end
end
- device pci_domain 0 on
+ device domain 0 on
subsystemid 0x15d9 0xab11 inherit #Tyan
chip northbridge/amd/agesa/family15 # CPU side of HT root complex
device pci 18.0 on # Put IO-HUB at link_num 0, Instead of HT Link topology
@@ -122,6 +122,6 @@ chip northbridge/amd/agesa/family15/root_complex
device pci 18.4 on end
device pci 18.5 on end #f15
end #chip northbridge/amd/agesa/family15 # CPU side of HT root complex
- end #pci_domain
+ end #domain
end #northbridge/amd/agesa/family15/root_complex
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-11 03:21:04 +0000