patches from Yh Lu. Tested and working on HDAMA

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

6 files changed, 85 insertions, 27 deletions

diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb
index 1b0552bf50..3367cd552a 100644
--- a/src/mainboard/tyan/s2880/Config.lb
+++ b/src/mainboard/tyan/s2880/Config.lb
@@ -16,11 +16,13 @@ uses ARCH
 ### Build the objects we have code for in this directory.
 ###
 ##object mainboard.o
-#config chip.h
-#register "fixup_scsi" = "1"
+config chip.h
+register "fixup_scsi" = "1"
 
 driver mainboard.o
 driver lsi_scsi.o
+driver adaptec_scsi.o
+driver intel_nic.o
 object static_devices.o
 if HAVE_MP_TABLE object mptable.o end
 if HAVE_PIRQ_TABLE object irq_tables.o end
diff --git a/src/mainboard/tyan/s2880/auto.c b/src/mainboard/tyan/s2880/auto.c
index 076bfffb2c..5dd6c673a0 100644
--- a/src/mainboard/tyan/s2880/auto.c
+++ b/src/mainboard/tyan/s2880/auto.c
@@ -14,7 +14,7 @@
 #include "lib/delay.c"
 #include "cpu/p6/boot_cpu.c"
 #include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+//#include "debug.c"
 
 static void memreset_setup(void)
 {
diff --git a/src/mainboard/tyan/s2880/chip.h b/src/mainboard/tyan/s2880/chip.h
index 1e13d514c7..b867070275 100644
--- a/src/mainboard/tyan/s2880/chip.h
+++ b/src/mainboard/tyan/s2880/chip.h
@@ -1,3 +1,5 @@
+extern struct chip_control mainboard_tyan_s2880_control;
+
 struct mainboard_tyan_s2880_config {
 	int fixup_scsi;
 };
diff --git a/src/mainboard/tyan/s2880/irq_tables.c b/src/mainboard/tyan/s2880/irq_tables.c
index cbaf7b8ded..84e0c67de2 100644
--- a/src/mainboard/tyan/s2880/irq_tables.c
+++ b/src/mainboard/tyan/s2880/irq_tables.c
@@ -18,20 +18,20 @@ const struct irq_routing_table intel_irq_routing_table = {
 	0x746b,         /* Device */
 	0,         /* Crap (miniport) */
 	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0xe8,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
+	0x37,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
 	{
 		{0,0x38, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0, 0},
 		{0x3,0, {{0, 0}, {0, 0}, {0, 0}, {0x4, 0xdef8}}, 0, 0},
 		{0x2,0x18, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x1, 0},
 		{0x2,0x30, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x2, 0},
-		{0x2,0x20, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x6, 0},
 		{0x1,0x40, {{0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}}, 0x3, 0},
 		{0x1,0x38, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x4, 0},
-		{0x3,0x8, {{0x1, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
 		{0x3,0x30, {{0x3, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
 		{0x3,0x20, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x5, 0},
 		{0x1,0x48, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0, 0}, {0, 0}}, 0, 0},
-		{0x3,0x28, {{0x2, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
 		{0x1,0x50, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0, 0}, {0, 0}}, 0, 0},
+		{0x3,0x28, {{0x2, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
+		{0x2,0x20, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x6, 0},
+		{0x2,0x28, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x7, 0},
 	}
 };
diff --git a/src/mainboard/tyan/s2880/mainboard.c b/src/mainboard/tyan/s2880/mainboard.c
index 4c86db85ce..446dd32bd4 100644
--- a/src/mainboard/tyan/s2880/mainboard.c
+++ b/src/mainboard/tyan/s2880/mainboard.c
@@ -1,10 +1,10 @@
 #include <console/console.h>
 #include <device/device.h>
-//#include <device/chip.h>
+#include <device/chip.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
-//#include "chip.h"
+#include "chip.h"
 //#include <part/mainboard.h>
 //#include "lsi_scsi.c"
 unsigned long initial_apicid[MAX_CPUS] =
@@ -35,8 +35,9 @@ static void fixup_lsi_53c1030(struct device *pdev)
 //	lsi_scsi_init(pdev);
 	
 }
+*/
 //extern static void lsi_scsi_init(struct device *dev);
-static void print_pci_regs(struct device *dev)
+/*static void print_pci_regs(struct device *dev)
 {
       uint8_t byte;
       int i;
@@ -55,12 +56,13 @@ static void print_pci_regs(struct device *dev)
 */
 static void onboard_scsi_fixup(void)
 {
-       struct device *dev;
-/*
-       // Set the scsi device id's 
+//       struct device *dev;
+
+/*       // Set the scsi device id's 
        printk_debug("%2d:%2d:%2d\n",0,1,0);
 	dev = dev_find_slot(0, PCI_DEVFN(0x1, 0));
        if (dev) {
+		print_pci_regs(dev);
         }
         // Set the scsi device id's 
        printk_debug("%2d:%2d:%2d\n",0,2,0);
@@ -68,32 +70,46 @@ static void onboard_scsi_fixup(void)
         if (dev) {
 		print_pci_regs(dev);
         }
- 
+
+        // Set the scsi device id's
+       printk_debug("%2d:%2d:%2d\n",0,3,0);
+        dev = dev_find_slot(0, PCI_DEVFN(0x3, 0));
+        if (dev) {
+                print_pci_regs(dev);
+        }
+
       // Set the scsi device id's
-       printk_debug("%2d:%2d:%2d\n",1,0xa,0);
-       dev = dev_find_slot(1, PCI_DEVFN(0xa, 0));
+       printk_debug("%2d:%2d:%2d\n",1,0x7,0);
+       dev = dev_find_slot(1, PCI_DEVFN(0x7, 0));
        if (dev) {
                 print_pci_regs(dev);
         }
         // Set the scsi device id's
-       printk_debug("%2d:%2d:%2d\n",1,0xa,1);
-        dev = dev_find_slot(1, PCI_DEVFN(0xa, 1));
+       printk_debug("%2d:%2d:%2d\n",1,0x8,0);
+        dev = dev_find_slot(1, PCI_DEVFN(0x8, 0));
         if (dev) {
                 print_pci_regs(dev);
         }
-       printk_debug("%2d:%2d:%2d\n",1,9,0);
-       dev = dev_find_slot(1, PCI_DEVFN(0x9, 0));
+       printk_debug("%2d:%2d:%2d\n",2,3,0);
+       dev = dev_find_slot(2, PCI_DEVFN(0x3, 0));
        if (dev) {
                 print_pci_regs(dev);
         }
         // Set the scsi device id's
-       printk_debug("%2d:%2d:%2d\n",1,9,1);
-        dev = dev_find_slot(1, PCI_DEVFN(0x9, 1));
+       printk_debug("%2d:%2d:%2d\n",2,6,0);
+        dev = dev_find_slot(2, PCI_DEVFN(0x6, 0));
+        if (dev) {
+                print_pci_regs(dev);
+        }
+        // Set the scsi device id's
+       printk_debug("%2d:%2d:%2d\n",3,4,0);
+        dev = dev_find_slot(3, PCI_DEVFN(0x4, 0));
         if (dev) {
                 print_pci_regs(dev);
         }
 */
 
+
 /*
         dev = dev_find_device(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_53C1030,0);
         if(!dev) {
@@ -105,7 +121,7 @@ static void onboard_scsi_fixup(void)
 */
 }
  
-/*
+
 static void
 enable(struct chip *chip, enum chip_pass pass)
 {
@@ -116,7 +132,7 @@ enable(struct chip *chip, enum chip_pass pass)
         switch (pass) {
 		default: break;
 		case CONF_PASS_PRE_BOOT:
-			 if (conf->fixup_scsi)
+			if (conf->fixup_scsi)
         			onboard_scsi_fixup();
 			printk_debug("mainboard fixup pass %d done\r\n",
 					pass);
@@ -132,7 +148,7 @@ void final_mainboard_fixup(void)
 }
 
 struct chip_control mainboard_tyan_s2880_control = {
-	        enable: enable,
-	        name:   "Tyan s2880 mainboard "
+	        .enable= enable,
+	        .name=   "Tyan s2880 mainboard "
 };
-*/
+
diff --git a/src/mainboard/tyan/s2880/mptable.c b/src/mainboard/tyan/s2880/mptable.c
index c4687b1197..adf768ed0f 100644
--- a/src/mainboard/tyan/s2880/mptable.c
+++ b/src/mainboard/tyan/s2880/mptable.c
@@ -71,13 +71,51 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x4, 0xf, 0x2, 0xf);
 	
 
+//On Board AMD USB
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, 0x3, 0x2, 0x13);
+
+//On Board ATI Display Adapter
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, 0x18, 0x2, 0x12);
+
+//Slot 5 PCI 32
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, 0x10, 0x2, 0x10);
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, 0x11, 0x2, 0x11);
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, 0x12, 0x2, 0x12); //
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, 0x13, 0x2, 0x13); //
+
+//On Board Promise Serial ATA
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x3, 0x14, 0x2, 0x11);
+
+//Slot 3 PCIX 100/66
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x20, 0x3, 0x3);
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x21, 0x3, 0x0);
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x22, 0x3, 0x1);//
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x23, 0x3, 0x2);//
+
+//Slot 4 PCIX 100/66        
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x1c, 0x3, 0x2);
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x1d, 0x3, 0x3);//
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x1e, 0x3, 0x0);//
+	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x1f, 0x3, 0x1);//
+
+//On Board NIC and LSI scsi
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x24, 0x3, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x25, 0x3, 0x1);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x28, 0x3, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x1, 0x29, 0x3, 0x1);
+
+//Slot 1 PCI-X 133/100/66
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0xc, 0x4, 0x0);
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0xd, 0x4, 0x1);
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0xe, 0x4, 0x2); //
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0xf, 0x4, 0x3); //
+
+//Slot 2 PCI-X 133/100/66
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x18, 0x4, 0x1);
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x19, 0x4, 0x2);
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x1a, 0x4, 0x3);//
+        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, 0x2, 0x1b, 0x4, 0x0);//
+
 /*Local Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#*/
 	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x0, 0x0, MP_APIC_ALL, 0x0);
 	smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, 0x0, 0x0, MP_APIC_ALL, 0x1);