diff options
author | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:17:25 +0000 |
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committer | arch import user (historical) <svn@openbios.org> | 2005-07-06 17:17:25 +0000 |
commit | 6ca7636c8f52560e732cdd5b1c7829cda5aa2bde (patch) | |
tree | cc45ae7c4dea6e2c5338f52b4314106bf07023be /src/mainboard/tyan/s4882/Options.lb | |
parent | b2ed53dd5669c2c3839633bd2b3b4af709a5b149 (diff) |
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
Creator: Yinghai Lu <yhlu@tyan.com>
cache_as_ram for AMD and some intel
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s4882/Options.lb')
-rw-r--r-- | src/mainboard/tyan/s4882/Options.lb | 33 |
1 files changed, 22 insertions, 11 deletions
diff --git a/src/mainboard/tyan/s4882/Options.lb b/src/mainboard/tyan/s4882/Options.lb index e1a431bde3..56a2548228 100644 --- a/src/mainboard/tyan/s4882/Options.lb +++ b/src/mainboard/tyan/s4882/Options.lb @@ -11,7 +11,6 @@ uses HAVE_OPTION_TABLE uses CONFIG_MAX_CPUS uses CONFIG_MAX_PHYSICAL_CPUS uses CONFIG_LOGICAL_CPUS -uses SERIAL_CPU_INIT uses CONFIG_IOAPIC uses CONFIG_SMP uses FALLBACK_SIZE @@ -48,16 +47,21 @@ uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL uses CONFIG_CONSOLE_SERIAL8250 uses HAVE_INIT_TIMER uses CONFIG_GDB_STUB +uses CONFIG_GDB_STUB uses CROSS_COMPILE uses CC uses HOSTCC uses OBJCOPY uses CONFIG_CHIP_NAME -uses CONFIG_CONSOLE_BTEXT uses CONFIG_CONSOLE_VGA uses CONFIG_PCI_ROM_RUN uses K8_E0_MEM_HOLE_SIZEK +uses USE_DCACHE_RAM +uses DCACHE_RAM_BASE +uses DCACHE_RAM_SIZE +uses CONFIG_USE_INIT + ### ### Build options ### @@ -85,7 +89,7 @@ default HAVE_HARD_RESET=1 ## ## Funky hard reset implementation ## -default HARD_RESET_BUS=1 +default HARD_RESET_BUS=3 default HARD_RESET_DEVICE=4 default HARD_RESET_FUNCTION=0 @@ -122,18 +126,25 @@ default CONFIG_MAX_CPUS=8 default CONFIG_MAX_PHYSICAL_CPUS=4 default CONFIG_LOGICAL_CPUS=1 -#default SERIAL_CPU_INIT=0 +#CHIP_NAME ? +default CONFIG_CHIP_NAME=1 #1G memory hole default K8_E0_MEM_HOLE_SIZEK=0x100000 -#BTEXT Console -#default CONFIG_CONSOLE_BTEXT=1 - #VGA Console default CONFIG_CONSOLE_VGA=1 default CONFIG_PCI_ROM_RUN=1 + +## +## enable CACHE_AS_RAM specifics +## +default USE_DCACHE_RAM=1 +default DCACHE_RAM_BASE=0xcf000 +default DCACHE_RAM_SIZE=0x1000 +default CONFIG_USE_INIT=1 + ## ## Build code to setup a generic IOAPIC ## @@ -142,8 +153,8 @@ default CONFIG_IOAPIC=1 ## ## Clean up the motherboard id strings ## -default MAINBOARD_PART_NUMBER="Tyan" -default MAINBOARD_VENDOR="s4882" +default MAINBOARD_PART_NUMBER="s4882" +default MAINBOARD_VENDOR="Tyan" default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x4882 @@ -232,9 +243,9 @@ default TTYS0_LCS=0x3 ## SPEW 9 Way too many details ## Request this level of debugging output -default DEFAULT_CONSOLE_LOGLEVEL=7 +default DEFAULT_CONSOLE_LOGLEVEL=8 ## At a maximum only compile in this level of debugging -default MAXIMUM_CONSOLE_LOGLEVEL=7 +default MAXIMUM_CONSOLE_LOGLEVEL=8 ## ## Select power on after power fail setting |