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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-21 17:29:59 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-21 17:29:59 +0000
commit57b2ff886e0ce2c92820f5722c8031def3ac94cf (patch)
tree3bf95eb33cd3de0b8f2bae495b3ae1453601c4d3 /src/mainboard/tyan/s2912_fam10
parent5244e1ba63e5f3ea12066734bfb0d864a8f1f11d (diff)
Drop excessive whitespace randomly sprinkled in romstage.c files.
Also drop some dead or useless code snippets. Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2912_fam10')
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c17
1 files changed, 1 insertions, 16 deletions
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 49bcd1af8b..6f420bfe63 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -34,32 +34,24 @@
#include <usbdebug.h>
#include <lib.h>
#include <spd.h>
-
#include <cpu/amd/model_10xxx_rev.h>
-
#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c"
#include "northbridge/amd/amdfam10/raminit.h"
#include "northbridge/amd/amdfam10/amdfam10.h"
-
#include "cpu/amd/model_10xxx/apic_timer.c"
#include "lib/delay.c"
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdfam10/reset_test.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "superio/winbond/w83627hf/w83627hf_early_init.c"
-
#include "cpu/x86/bist.h"
-
#include "northbridge/amd/amdfam10/debug.c"
-
#include "cpu/x86/mtrr/earlymtrr.c"
-
#include "northbridge/amd/amdfam10/setup_resource_map.c"
+#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-
static inline void activate_spd_rom(const struct mem_controller *ctrl)
{
/* nothing to do */
@@ -71,12 +63,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
#include "northbridge/amd/amdfam10/amdfam10.h"
-
#include "northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c"
#include "northbridge/amd/amdfam10/amdfam10_pci.c"
-
#include "resourcemap.c"
-
#include "cpu/amd/quadcore/quadcore.c"
#define MCP55_MB_SETUP \
@@ -89,14 +78,10 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "southbridge/nvidia/mcp55/mcp55_early_setup_ss.h"
#include "southbridge/nvidia/mcp55/mcp55_early_setup_car.c"
-
#include "cpu/amd/car/post_cache_as_ram.c"
-
#include "cpu/amd/microcode/microcode.c"
#include "cpu/amd/model_10xxx/update_microcode.c"
#include "cpu/amd/model_10xxx/init_cpus.c"
-
-
#include "southbridge/nvidia/mcp55/mcp55_enable_rom.c"
#include "northbridge/amd/amdfam10/early_ht.c"