Kill remaining unneeded CAR/ROMCC if-blocks.

Lots of Config.lb files still have "if USE_DCACHE_RAM" sections although
USE_DCACHE_RAM is always set for them. Such checks are not only
pointless, they actively make the files hard to read.

A full abuild run confirmed that compilation did not change with this
patch applied.

The patch does not change whitespace of the remaining code to ease
review and svn blame.

With this change, it should be possible to have two or three Config.lb
variants in total (except the actual hardware config). Right now, some
Config.lb have comments, some don't, some have empty lines for better
readability, some don't, some have leading whitespace, some don't. This
is an utter mess and unifying these files would certainly reduce the
headaches I have when looking at them.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 0 insertions, 16 deletions

diff --git a/src/mainboard/tyan/s2912/Config.lb b/src/mainboard/tyan/s2912/Config.lb
index 28adac4e92..b0cac7b0f4 100644
--- a/src/mainboard/tyan/s2912/Config.lb
+++ b/src/mainboard/tyan/s2912/Config.lb
@@ -81,8 +81,6 @@ if HAVE_MP_TABLE object mptable.o end
 if HAVE_PIRQ_TABLE object irq_tables.o end
 #object reset.o
 
-if USE_DCACHE_RAM
-
 	if CONFIG_USE_INIT
 		makerule ./cache_as_ram_auto.o
 			depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
@@ -97,8 +95,6 @@ if USE_DCACHE_RAM
 		end
 	end
 
-end
-
 if USE_FAILOVER_IMAGE
 else
     if CONFIG_AP_CODE_IN_CAR
@@ -128,7 +124,6 @@ end
 
 mainboardinit cpu/x86/32bit/entry32.inc
 
-if USE_DCACHE_RAM
 	if CONFIG_USE_INIT
 		ldscript /cpu/x86/32bit/entry32.lds
 	end
@@ -136,8 +131,6 @@ if USE_DCACHE_RAM
 	if CONFIG_USE_INIT
 		ldscript /cpu/amd/car/cache_as_ram.lds
 	end
-end
-
 
 ##
 ## Build our reset vector (This is where coreboot is entered)
@@ -181,12 +174,10 @@ else
     end
 end
 
-if USE_DCACHE_RAM
 	##
 	## Setup Cache-As-Ram
 	##
 	mainboardinit cpu/amd/car/cache_as_ram.inc
-end
 
 ###
 ### This is the early phase of coreboot startup
@@ -195,29 +186,22 @@ end
 ###
 if HAVE_FAILOVER_BOOT
     if USE_FAILOVER_IMAGE
-	if USE_DCACHE_RAM
 		ldscript /arch/i386/lib/failover_failover.lds
-	end
     end
 else
     if USE_FALLBACK_IMAGE
-	if USE_DCACHE_RAM
 		ldscript /arch/i386/lib/failover.lds
-	end
     end
 end
 
 ##
 ## Setup RAM
 ##
-if USE_DCACHE_RAM
-
 	if CONFIG_USE_INIT
 		initobject cache_as_ram_auto.o
 	else
 		mainboardinit ./cache_as_ram_auto.inc
 	end
-end
 
 ##
 ## Include the secondary Configuration files