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authorMyles Watson <mylesgw@gmail.com>2009-10-14 02:38:24 +0000
committerMyles Watson <mylesgw@gmail.com>2009-10-14 02:38:24 +0000
commitb0575d8e1fe1a3368ec4690dde4ffd4fe7f033d3 (patch)
tree1ae7287bffd647584fb199e92cee5032b2f76ae2 /src/mainboard/tyan/s2892
parent21ee98bf79c00b3b5693f2ce43d98fa8335589d4 (diff)
Use CAR ck804 code with the s2892.
Reset the s2891 so the HT speed gets updated. Remove some PANTA comments. Add SATA init from non-CAR version. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2892')
-rw-r--r--src/mainboard/tyan/s2892/cache_as_ram_auto.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/tyan/s2892/cache_as_ram_auto.c b/src/mainboard/tyan/s2892/cache_as_ram_auto.c
index a28d4a9957..92698308e9 100644
--- a/src/mainboard/tyan/s2892/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2892/cache_as_ram_auto.c
@@ -75,7 +75,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+16, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* K4,GPIO17, PCIXB_PRSNT1_L*/ \
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0+45, ~(0xff),((0<<4)|(0<<2)|(0<<0)),/* P7,GPIO46, PCIXB_PRSNT2_L*/ \
-#include "southbridge/nvidia/ck804/ck804_early_setup.c"
+#include "southbridge/nvidia/ck804/ck804_early_setup_car.c"
#include "cpu/amd/car/copy_and_run.c"