diff options
author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-08-12 15:00:51 +0000 |
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committer | Ronald G. Minnich <rminnich@gmail.com> | 2009-08-12 15:00:51 +0000 |
commit | 0588d19abef62dad63a7794a37bdd6a71c526d9e (patch) | |
tree | 1c507caa1ffed6ceb73d3e13fc9b766a713d16e2 /src/mainboard/tyan/s2891 | |
parent | 38cd29ebd7282333650cf11ed50c7f2fd4031e80 (diff) |
Kconfig!
Works on Kontron, qemu, and serengeti.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
tested on abuild only.
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2891')
-rw-r--r-- | src/mainboard/tyan/s2891/devicetree.cb | 158 |
1 files changed, 158 insertions, 0 deletions
diff --git a/src/mainboard/tyan/s2891/devicetree.cb b/src/mainboard/tyan/s2891/devicetree.cb new file mode 100644 index 0000000000..6f04732028 --- /dev/null +++ b/src/mainboard/tyan/s2891/devicetree.cb @@ -0,0 +1,158 @@ +chip northbridge/amd/amdk8/root_complex + device apic_cluster 0 on + chip cpu/amd/socket_940 + device apic 0 on end + end + end + device pci_domain 0 on + chip northbridge/amd/amdk8 #mc0 + device pci 18.0 on # northbridge + # devices on link 0, link 0 == LDT 0 + chip southbridge/nvidia/ck804 + device pci 0.0 on end # HT + device pci 1.0 on # LPC + chip superio/winbond/w83627hf + device pnp 2e.0 off # Floppy + io 0x60 = 0x3f0 + irq 0x70 = 6 + drq 0x74 = 2 + end + device pnp 2e.1 off # Parallel Port + io 0x60 = 0x378 + irq 0x70 = 7 + end + device pnp 2e.2 on # Com1 + io 0x60 = 0x3f8 + irq 0x70 = 4 + end + device pnp 2e.3 off # Com2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 + io 0x62 = 0x64 + irq 0x70 = 1 + irq 0x72 = 12 + end + device pnp 2e.6 off # CIR + io 0x60 = 0x100 + end + device pnp 2e.7 off # GAME_MIDI_GIPO1 + io 0x60 = 0x220 + io 0x62 = 0x300 + irq 0x70 = 9 + end + device pnp 2e.8 off end # GPIO2 + device pnp 2e.9 off end # GPIO3 + device pnp 2e.a off end # ACPI + device pnp 2e.b off # HW Monitor + io 0x60 = 0x290 + irq 0x70 = 5 + end + end + end + device pci 1.1 on # SM 0 +# chip drivers/generic/generic #dimm 0-0-0 +# device i2c 50 on end +# end +# chip drivers/generic/generic #dimm 0-0-1 +# device i2c 51 on end +# end +# chip drivers/generic/generic #dimm 0-1-0 +# device i2c 52 on end +# end +# chip drivers/generic/generic #dimm 0-1-1 +# device i2c 53 on end +# end +# chip drivers/generic/generic #dimm 1-0-0 +# device i2c 54 on end +# end +# chip drivers/generic/generic #dimm 1-0-1 +# device i2c 55 on end +# end +# chip drivers/generic/generic #dimm 1-1-0 +# device i2c 56 on end +# end +# chip drivers/generic/generic #dimm 1-1-1 +# device i2c 57 on end +# end + end # SM +# device pci 1.1 on # SM 1 +# chip drivers/i2c/adm1027 # ADT7463A CPU0 temp, SYS FAN 2/3/4 +# device i2c 2d on end +# end +# chip drivers/i2c/adm1027 # ADT7463A CPU1 temp, CPU0/1 FAN , SYS FAN 1/5 +# device i2c 2e on end +# end +# chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 6/7, SB FAN +# device i2c 2a on end +# end +# chip drivers/generic/generic # Winbond HWM 0x92 +# device i2c 49 on end +# end +# chip drivers/generic/generic # Winbond HWM 0x94 +# device i2c 4a on end +# end +# end #SM + device pci 2.0 on end # USB 1.1 + device pci 2.1 on end # USB 2 + device pci 4.0 off end # ACI + device pci 4.1 off end # MCI + device pci 6.0 on end # IDE + device pci 7.0 on end # SATA 1 + device pci 8.0 on end # SATA 0 + device pci 9.0 on # PCI + # chip drivers/ati/ragexl + chip drivers/pci/onboard + device pci 7.0 on end + #register "rom_address" = "0xfff80000" #for 512K + register "rom_address" = "0xfff00000" #for 1M + end + end + device pci a.0 off end # NIC + device pci b.0 off end # PCI E 3 + device pci c.0 off end # PCI E 2 + device pci d.0 on end # PCI E 1 + device pci e.0 on end # PCI E 0 + register "ide0_enable" = "1" + register "ide1_enable" = "1" + register "sata0_enable" = "1" + register "sata1_enable" = "1" + end + end # device pci 18.0 + device pci 18.0 on end # Link 1 + device pci 18.0 on + # devices on link 2, link 2 == LDT 2 + chip southbridge/amd/amd8131 + # the on/off keyword is mandatory + device pci 0.0 on end + device pci 0.1 on end + device pci 1.0 on + chip drivers/pci/onboard + device pci 9.0 on end + device pci 9.1 on end + end + end + device pci 1.1 on end + end + end # device pci 18.0 + device pci 18.1 on end + device pci 18.2 on end + device pci 18.3 on end + end #mc0 + + end # pci_domain + +# chip drivers/generic/debug +# device pnp 0.0 off end # chip name +# device pnp 0.1 off end # pci_regs_all +# device pnp 0.2 off end # mem +# device pnp 0.3 off end # cpuid +# device pnp 0.4 off end # smbus_regs_all +# device pnp 0.5 off end # dual core msr +# device pnp 0.6 off end # cache size +# device pnp 0.7 off end # tsc +# device pnp 0.8 on end # hard_reset +# end +end # root_complex |