i2c mux support

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1809 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

3 files changed, 103 insertions, 72 deletions

diff --git a/src/mainboard/tyan/s2885/Config.lb b/src/mainboard/tyan/s2885/Config.lb
index 3605b85d28..18d86f66fb 100644
--- a/src/mainboard/tyan/s2885/Config.lb
+++ b/src/mainboard/tyan/s2885/Config.lb
@@ -181,7 +181,7 @@ chip northbridge/amd/amdk8/root_complex
                 	                 			io 0x60 = 0x3f8
                 	                			irq 0x70 = 4
 							end
-                	        			device pnp 2e.3 off #  Com2
+                	        			device pnp 2e.3 on #  Com2
                 	                 			io 0x60 = 0x2f8
                 	                			irq 0x70 = 3
 							end
@@ -195,8 +195,8 @@ chip northbridge/amd/amdk8/root_complex
 								io 0x60 = 0x100
 							end
                 	        			device pnp 2e.7 off #  GAME_MIDI_GIPO1
-								io 0x60 = 0x201
-								io 0x62 = 0x330
+								io 0x60 = 0x220
+								io 0x62 = 0x300
 								irq 0x70 = 9
 							end						
                 	        			device pnp 2e.8 off end #  GPIO2
@@ -210,7 +210,32 @@ chip northbridge/amd/amdk8/root_complex
 					end
 					device pci 1.1 on end
 					device pci 1.2 on end
-					device pci 1.3 on end
+					device pci 1.3 on
+                                                chip drivers/generic/generic #dimm 0-0-0
+                                                        device i2c 50 on end
+                                                end              
+                                                chip drivers/generic/generic #dimm 0-0-1
+                                                        device i2c 51 on end
+                                                end     
+                                                chip drivers/generic/generic #dimm 0-1-0
+                                                        device i2c 52 on end
+                                                end             
+                                                chip drivers/generic/generic #dimm 0-1-1
+                                                        device i2c 53 on end
+                                                end              
+                                                chip drivers/generic/generic #dimm 1-0-0
+                                                        device i2c 54 on end
+                                                end     
+                                                chip drivers/generic/generic #dimm 1-0-1
+                                                        device i2c 55 on end
+                                                end
+                                                chip drivers/generic/generic #dimm 1-1-0
+                                                        device i2c 56 on end
+                                                end     
+                                                chip drivers/generic/generic #dimm 1-1-1
+                                                        device i2c 57 on end
+                                                end 
+					end # acpi
 					device pci 1.5 on end
 					device pci 1.6 off end
                 	                register "ide0_enable" = "1"
@@ -221,12 +246,12 @@ chip northbridge/amd/amdk8/root_complex
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on 
-#               	         chip drivers/generic/debug
-#               	                 device pnp 1.0 on end
-#               	                 device pnp 1.1 off end
-#               	                 device pnp 1.2 off end
-#               	                 device pnp 1.3 on end
-#               	         end
+#				chip drivers/generic/debug
+#             	                	 device pnp 1.0 on end
+#	               	                 device pnp 1.1 off end
+#        	       	                 device pnp 1.2 off end
+#               		                 device pnp 1.3 on end
+#               	        	 end
 			end
 		end
 
@@ -248,11 +273,11 @@ chip northbridge/amd/amdk8/root_complex
 		end
 	end
 
-        chip drivers/generic/debug 
-                device pnp 0.0 on end
-                device pnp 0.1 off end 
-                device pnp 0.2 off end
-                device pnp 0.3 on end
-        end
+#        chip drivers/generic/debug 
+#                device pnp 0.0 on end
+#                device pnp 0.1 off end 
+#                device pnp 0.2 off end
+#                device pnp 0.3 on end
+#        end
 end
 
diff --git a/src/mainboard/tyan/s2885/auto.c b/src/mainboard/tyan/s2885/auto.c
index 7211429854..673a6bc62a 100644
--- a/src/mainboard/tyan/s2885/auto.c
+++ b/src/mainboard/tyan/s2885/auto.c
@@ -152,30 +152,30 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #define TOTAL_CPUS (FIRST_CPU + SECOND_CPU)
 static void main(unsigned long bist)
 {
-	static const struct mem_controller cpu[] = {
+        static const struct mem_controller cpu[] = {
 #if FIRST_CPU
-		{
-			.node_id = 0,
-			.f0 = PCI_DEV(0, 0x18, 0),
-			.f1 = PCI_DEV(0, 0x18, 1),
-			.f2 = PCI_DEV(0, 0x18, 2),
-			.f3 = PCI_DEV(0, 0x18, 3),
-			.channel0 = { (0xa<<3)|0, (0xa<<3)|2, 0, 0 },
-			.channel1 = { (0xa<<3)|1, (0xa<<3)|3, 0, 0 },
-		},
+                {
+                        .node_id = 0,
+                        .f0 = PCI_DEV(0, 0x18, 0),
+                        .f1 = PCI_DEV(0, 0x18, 1),
+                        .f2 = PCI_DEV(0, 0x18, 2),
+                        .f3 = PCI_DEV(0, 0x18, 3),
+                        .channel0 = { (0xa<<3)|0, (0xa<<3)|2, 0, 0 },
+                        .channel1 = { (0xa<<3)|1, (0xa<<3)|3, 0, 0 },
+                },
 #endif
 #if SECOND_CPU
-		{
-			.node_id = 1,
-			.f0 = PCI_DEV(0, 0x19, 0),
-			.f1 = PCI_DEV(0, 0x19, 1),
-			.f2 = PCI_DEV(0, 0x19, 2),
-			.f3 = PCI_DEV(0, 0x19, 3),
-			.channel0 = { (0xa<<3)|4, (0xa<<3)|6, 0, 0 },
-			.channel1 = { (0xa<<3)|5, (0xa<<3)|7, 0, 0 },
-		},
+                {
+                        .node_id = 1,
+                        .f0 = PCI_DEV(0, 0x19, 0),
+                        .f1 = PCI_DEV(0, 0x19, 1),
+                        .f2 = PCI_DEV(0, 0x19, 2),
+                        .f3 = PCI_DEV(0, 0x19, 3),
+                        .channel0 = { (0xa<<3)|4, (0xa<<3)|6, 0, 0 },
+                        .channel1 = { (0xa<<3)|5, (0xa<<3)|7, 0, 0 },
+                },
 #endif
-	};
+        };
 
 #if 1
         static const struct ht_chain ht_c[] = {
@@ -245,33 +245,28 @@ static void main(unsigned long bist)
 	sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
 
 #if 0
-	dump_pci_devices();
+        dump_pci_devices();
 #endif
+
+        /* Check all of memory */
 #if 0
-	dump_pci_device(PCI_DEV(0, 0x18, 1));
+        msr_t msr;
+        msr = rdmsr(TOP_MEM2);
+        print_debug("TOP_MEM2: ");
+        print_debug_hex32(msr.hi);
+        print_debug_hex32(msr.lo);
+        print_debug("\r\n");
 #endif
-	/* Check all of memory */
-#if 0
-	msr_t msr;
-	msr = rdmsr(TOP_MEM2);
-	print_debug("TOP_MEM2: ");
-	print_debug_hex32(msr.hi);
-	print_debug_hex32(msr.lo);
-	print_debug("\r\n");
-	
-	ram_check(0x00000000, msr.lo+(msr.hi<<32));
 
+#if  0
+        ram_check(0x00000000, msr.lo+(msr.hi<<32));
 #endif
 
-#if 0 
-
-//#if TOTAL_CPUS < 2
-	// Check 16MB of memory @ 0
-	ram_check(0x00000000, 0x00100000);
-//#else
-	// Check 16MB of memory @ 2GB 
-//	ram_check(0x80000000, 0x80100000);
-//#endif
+#if 0
+        // Check 16MB of memory @ 0
+        ram_check(0x00000000, 0x00100000);
+        // Check 16MB of memory @ 2GB 
+        ram_check(0x80000000, 0x80100000);
 #endif
 
 
diff --git a/src/mainboard/tyan/s2885/irq_tables.c b/src/mainboard/tyan/s2885/irq_tables.c
index 84ebd0be97..6bd4a2123a 100644
--- a/src/mainboard/tyan/s2885/irq_tables.c
+++ b/src/mainboard/tyan/s2885/irq_tables.c
@@ -10,26 +10,37 @@
 const struct irq_routing_table intel_irq_routing_table = {
 	PIRQ_SIGNATURE, /* u32 signature */
 	PIRQ_VERSION,   /* u16 version   */
-	32+16*11,        /* there can be total 11 devices on the bus */
-	3,           /* Where the interrupt router lies (bus) */
+	32+16*22,        /* there can be total 22 devices on the bus */
+	1,           /* Where the interrupt router lies (bus) */
 	(4<<3)|3,           /* Where the interrupt router lies (dev) */
 	0,         /* IRQs devoted exclusively to PCI usage */
 	0x1022,         /* Vendor */
-	0x746b,         /* Device */
+	0x7400,         /* Device */
 	0,         /* Crap (miniport) */
 	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0xd8,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
+	0x5b,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
 	{
-		{3,(4<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0, 0},
-		{0x6,0, {{0, 0}, {0, 0}, {0, 0}, {0x4, 0xdef8}}, 0, 0},
-		{0x1,0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0, 0}, {0, 0}}, 0x0, 0},
-		{0x5,(3<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x1, 0},
-		{0x5,(6<<3)|0, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x2, 0},
-		{0x4,(8<<3)|0, {{0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}}, 0x3, 0},
-		{0x4,(7<<3)|0, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x4, 0},
-		{0x6,(0x0a<<3)|0, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x5, 0},
-		{0x4,(9<<3)|0, {{0x1, 0xdef8}, {2, 0xdef8}, {0, 0}, {0, 0}}, 0, 0},
-		{0x6,(0x0b<<3)|0, {{0x2, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
-		{0x6,(0x0c<<3)|0, {{0x4, 0xdef8}, {0, 0}, {0, 0}, {0, 0}}, 0, 0},
+		{0,0xc0, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{1,(3<<3)|0, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0x4,0, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0x4, 0xdef8}}, 0, 0},
+		{0x4,0x8, {{0x1, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0x4,0x20, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x1, 0},
+		{0x4,0x18, {{0x2, 0xdef8}, {0x1, 0xdef8}, {0x3, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0x4,0x28, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0x4,0x30, {{0x3, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{1,(4<<3)|0, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{1,(1<<3)|0, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0x2,0x18, {{0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}}, 0x2, 0},
+		{0x2,0x10, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x3, 0},
+		{0x2,0x48, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0x2,0x20, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{1,(2<<3)|0, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0x3,0x18, {{0x1, 0xdef8}, {0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}}, 0x4, 0},
+		{0x3,0x8, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x5, 0},
+		{0x3,0x20, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x6, 0},
+		{0x3,0x28, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x7, 0},
+		{0,0xc8, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0,0xd0, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
+		{0,0xd8, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
 	}
 };