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authorStefan Reinauer <stepan@openbios.org>2004-03-25 09:31:10 +0000
committerStefan Reinauer <stepan@openbios.org>2004-03-25 09:31:10 +0000
commit01f887d9f8546be08b51a2752af0473ab51e4214 (patch)
tree6b0a7f8a2e4ade9bacf43de8d1251b71fa169913 /src/mainboard/tyan/s2885
parent7011f9f0fe2eb5622fc60c82786ef2ae6655c5f5 (diff)
Merging patches from Yinghai Lu (fb2_s4882_changes.diff.bz2):
- new motherboard: Tyan s4882 - minor changes to 2880, s2881, s2885, s4880 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2885')
-rw-r--r--src/mainboard/tyan/s2885/Config.lb1
-rw-r--r--src/mainboard/tyan/s2885/auto.c9
-rw-r--r--src/mainboard/tyan/s2885/mainboard.c8
3 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/tyan/s2885/Config.lb b/src/mainboard/tyan/s2885/Config.lb
index c0b61145cb..db6b2f030c 100644
--- a/src/mainboard/tyan/s2885/Config.lb
+++ b/src/mainboard/tyan/s2885/Config.lb
@@ -198,6 +198,7 @@ northbridge amd/amdk8 "mc0"
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
+ irq 0x72 = 12
pnp 2e.6 off # CIR
pnp 2e.7 off # GAME_MIDI_GIPO1
pnp 2e.8 off # GPIO2
diff --git a/src/mainboard/tyan/s2885/auto.c b/src/mainboard/tyan/s2885/auto.c
index 135418bdcb..307331375c 100644
--- a/src/mainboard/tyan/s2885/auto.c
+++ b/src/mainboard/tyan/s2885/auto.c
@@ -29,7 +29,7 @@ static void hard_reset(void)
set_bios_reset();
/* enable cf9 */
- pci_write_config8(PCI_DEV(1, 0x04, 3), 0x41, 0xf1);
+ pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1);
/* reset */
outb(0x0e, 0x0cf9);
}
@@ -37,7 +37,7 @@ static void hard_reset(void)
static void soft_reset(void)
{
set_bios_reset();
- pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1);
+ pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
}
#define REV_B_RESET 0
@@ -114,9 +114,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
-/* include mainboard specific ht code */
-#include "hypertransport.c"
-
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
@@ -167,7 +164,7 @@ static void main(void)
console_init();
setup_s2885_resource_map();
needs_reset = setup_coherent_ht_domain();
- needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80);
+ needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0xc0);
if (needs_reset) {
print_info("ht reset -");
soft_reset();
diff --git a/src/mainboard/tyan/s2885/mainboard.c b/src/mainboard/tyan/s2885/mainboard.c
index cd2a9679fa..e142f1b6d7 100644
--- a/src/mainboard/tyan/s2885/mainboard.c
+++ b/src/mainboard/tyan/s2885/mainboard.c
@@ -119,7 +119,7 @@ static void onboard_scsi_fixup(void)
// print_mem();
// amd8111_enable_rom();
}
-
+#if 0
static void vga_fixup(void) {
// we do this right here because:
// - all the hardware is working, and some VGA bioses seem to need
@@ -136,6 +136,8 @@ static void vga_fixup(void) {
#endif
}
+
+#endif
static void
@@ -153,8 +155,8 @@ enable(struct chip *chip, enum chip_pass pass)
case CONF_PASS_PRE_BOOT:
if (conf->fixup_scsi)
onboard_scsi_fixup();
- if (conf->fixup_vga)
- vga_fixup();
+// if (conf->fixup_vga)
+// vga_fixup();
printk_debug("mainboard fixup pass %d done\r\n",
pass);
break;