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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-04-03 12:55:55 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-04-03 12:55:55 +0000
commit11f054a5785af6a1c29eebbe1b91f3570dca6228 (patch)
treedbcd6de5f567aff12060e2b0e15c4b5f23d650b3 /src/mainboard/tyan/s2882/failover.c
parentaed1f925a65a231ed008902f1946b3680227f098 (diff)
Next step. Kill auto.c and failover.c and clean up Config.lb for
tyan/s2735 tyan/s2850 tyan/s2875 tyan/s2880 tyan/s2881 tyan/s2882 tyan/s2885 tyan/s2891 tyan/s2892 tyan/s2895 Abuild log is completely identical with and without the patch. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2882/failover.c')
-rw-r--r--src/mainboard/tyan/s2882/failover.c68
1 files changed, 0 insertions, 68 deletions
diff --git a/src/mainboard/tyan/s2882/failover.c b/src/mainboard/tyan/s2882/failover.c
deleted file mode 100644
index 6b7eda80be..0000000000
--- a/src/mainboard/tyan/s2882/failover.c
+++ /dev/null
@@ -1,68 +0,0 @@
-#define ASSEMBLY 1
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/mc146818rtc_early.c"
-#include "southbridge/amd/amd8111/amd8111_enable_rom.c"
-#include "northbridge/amd/amdk8/early_ht.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
-#include "northbridge/amd/amdk8/reset_test.c"
-
-#if CONFIG_LOGICAL_CPUS==1
-#include "cpu/amd/dualcore/dualcore_id.c"
-#endif
-
-
-static unsigned long main(unsigned long bist)
-{
- /* Make cerain my local apic is useable */
- enable_lapic();
-
- /* Is this a cpu only reset? */
- if (early_mtrr_init_detected()) {
- if (last_boot_normal()) {
- goto normal_image;
- } else {
- goto fallback_image;
- }
- }
- /* Is this a secondary cpu? */
- if (!boot_cpu()) {
- if (last_boot_normal()) {
- goto normal_image;
- } else {
- goto fallback_image;
- }
- }
-
- /* Nothing special needs to be done to find bus 0 */
- /* Allow the HT devices to be found */
- enumerate_ht_chain();
-
- /* Setup the 8111 */
- amd8111_enable_rom();
-
- /* Is this a deliberate reset by the bios */
- if (bios_reset_detected() && last_boot_normal()) {
- goto normal_image;
- }
- /* This is the primary cpu how should I boot? */
- else if (do_normal_boot()) {
- goto normal_image;
- }
- else {
- goto fallback_image;
- }
- normal_image:
- asm volatile ("jmp __normal_image"
- : /* outputs */
- : "a" (bist) /* inputs */
- : /* clobbers */
- );
- fallback_image:
- return bist;
-}