Since some people disapprove of white space cleanups mixed in regular commits

while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

7 files changed, 34 insertions, 34 deletions

diff --git a/src/mainboard/tyan/s2881/devicetree.cb b/src/mainboard/tyan/s2881/devicetree.cb
index 3c1f5bc276..47b5d37775 100644
--- a/src/mainboard/tyan/s2881/devicetree.cb
+++ b/src/mainboard/tyan/s2881/devicetree.cb
@@ -8,11 +8,11 @@ chip northbridge/amd/amdk8/root_complex
 		chip northbridge/amd/amdk8
 			device pci 18.0 on end # LDT0
 			device pci 18.0 on end # LDT1
-			device pci 18.0 on #  northbridge 
+			device pci 18.0 on #  northbridge
 				#  devices on link 2, link 2 == LDT 2
 				chip southbridge/amd/amd8131
 					# the on/off keyword is mandatory
-					device pci 0.0 on 
+					device pci 0.0 on
                                                 device pci 9.0 on end # Broadcom 5704
                                                 device pci 9.1 on end
                                                 device pci a.0 on end # Adaptic
@@ -65,7 +65,7 @@ chip northbridge/amd/amdk8/root_complex
                 	                                        io 0x60 = 0x220
                 	                                        io 0x62 = 0x300
                 	                                        irq 0x70 = 9
-                	                                end  
+                	                                end
                 	                                device pnp 2e.8 off end #  GPIO2
                 	                                device pnp 2e.9 off end #  GPIO3
                 	                                device pnp 2e.a off end #  ACPI
@@ -77,13 +77,13 @@ chip northbridge/amd/amdk8/root_complex
 					end
 					device pci 1.1 on end
 					device pci 1.2 on end
-                                        device pci 1.3 on 
+                                        device pci 1.3 on
                                                 chip drivers/generic/generic #dimm 0-0-0
                                                         device i2c 50 on end
                                                 end
                                                 chip drivers/generic/generic #dimm 0-0-1
                                                         device i2c 51 on end
-                                                end     
+                                                end
                                                 chip drivers/generic/generic #dimm 0-1-0
                                                         device i2c 52 on end
                                                 end
@@ -120,12 +120,12 @@ chip northbridge/amd/amdk8/root_complex
                                         register "ide0_enable" = "1"
                                         register "ide1_enable" = "1"
 				end
-			end #  device pci 18.0 
-			
+			end #  device pci 18.0
+
 			device pci 18.1 on end
 			device pci 18.2 on end
 			device pci 18.3 on end
 		end
-	end 
+	end
 end
 
diff --git a/src/mainboard/tyan/s2881/get_bus_conf.c b/src/mainboard/tyan/s2881/get_bus_conf.c
index 758e3d809d..562ba935d8 100644
--- a/src/mainboard/tyan/s2881/get_bus_conf.c
+++ b/src/mainboard/tyan/s2881/get_bus_conf.c
@@ -23,7 +23,7 @@ unsigned apicid_8111 ;
 unsigned apicid_8131_1;
 unsigned apicid_8131_2;
 
-unsigned pci1234x[] = 
+unsigned pci1234x[] =
 {        //Here you only need to set value in pci1234 for HT-IO that could be installed or not
 	 //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
         0x0000ff0,
@@ -35,7 +35,7 @@ unsigned pci1234x[] =
 //        0x0000ff0,
 //        0x0000ff0
 };
-unsigned hcdnx[] = 
+unsigned hcdnx[] =
 { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most
 	0x20202020,
 //	0x20202020,
@@ -71,7 +71,7 @@ void get_bus_conf(void)
         }
 
         get_sblk_pci1234();
-	
+
 	sysconf.sbdn = (sysconf.hcdn[0] >> 8) & 0xff;
 	sbdn3 = sysconf.hcdn[0] & 0xff;
 
@@ -119,8 +119,8 @@ void get_bus_conf(void)
 /*I/O APICs:	APIC ID	Version	State		Address*/
 #if CONFIG_LOGICAL_CPUS==1
 	apicid_base = get_apicid_base(3);
-#else 
-	apicid_base = CONFIG_MAX_PHYSICAL_CPUS; 
+#else
+	apicid_base = CONFIG_MAX_PHYSICAL_CPUS;
 #endif
 	apicid_8111 = apicid_base+0;
 	apicid_8131_1 = apicid_base+1;
diff --git a/src/mainboard/tyan/s2881/irq_tables.c b/src/mainboard/tyan/s2881/irq_tables.c
index af66ba9730..b53a9923a7 100644
--- a/src/mainboard/tyan/s2881/irq_tables.c
+++ b/src/mainboard/tyan/s2881/irq_tables.c
@@ -1,4 +1,4 @@
-/* This file was generated by getpir.c, do not modify! 
+/* This file was generated by getpir.c, do not modify!
    (but if you do, please run checkpir on it to verify)
    Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up
 
@@ -12,11 +12,11 @@
 
 #include <cpu/amd/amdk8_sysconf.h>
 
-static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0, 
+static void write_pirq_info(struct irq_info *pirq_info, uint8_t bus, uint8_t devfn, uint8_t link0, uint16_t bitmap0,
 		uint8_t link1, uint16_t bitmap1, uint8_t link2, uint16_t bitmap2,uint8_t link3, uint16_t bitmap3,
 		uint8_t slot, uint8_t rfu)
 {
-        pirq_info->bus = bus; 
+        pirq_info->bus = bus;
         pirq_info->devfn = devfn;
                 pirq_info->irq[0].link = link0;
                 pirq_info->irq[0].bitmap = bitmap0;
@@ -62,22 +62,22 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 
 	pirq = (void *)(addr);
 	v = (uint8_t *)(addr);
-	
+
 	pirq->signature = PIRQ_SIGNATURE;
 	pirq->version  = PIRQ_VERSION;
-	
+
 	pirq->rtr_bus = bus_8111_0;
 	pirq->rtr_devfn = ((sysconf.sbdn+1)<<3)|0;
 
 	pirq->exclusive_irqs = 0;
-	
+
 	pirq->rtr_vendor = 0x1022;
 	pirq->rtr_device = 0x746b;
 
 	pirq->miniport_data = 0;
 
 	memset(pirq->rfu, 0, sizeof(pirq->rfu));
-	
+
 	pirq_info = (void *) ( &pirq->checksum + 1);
 	slot_num = 0;
 //pci bridge
@@ -88,11 +88,11 @@ unsigned long write_pirq_routing_table(unsigned long addr)
 //        pirq_info++; slot_num++;
 
         pirq_info++; slot_num++;
-             
-	pirq->size = 32 + 16 * slot_num; 
+
+	pirq->size = 32 + 16 * slot_num;
 
         for (i = 0; i < pirq->size; i++)
-                sum += v[i];	
+                sum += v[i];
 
 	sum = pirq->checksum - sum;
 
diff --git a/src/mainboard/tyan/s2881/mainboard.c b/src/mainboard/tyan/s2881/mainboard.c
index 5866577ce4..773f2540a4 100644
--- a/src/mainboard/tyan/s2881/mainboard.c
+++ b/src/mainboard/tyan/s2881/mainboard.c
@@ -59,7 +59,7 @@ static void adt7463_init(device_t dev)
 	result = smbus_write_byte(adt7463, 0x5e, 0xc2);
 
 	/* Make sure that our fans never stop when temp. falls below Tmin,
-	 * but rather keep going at minimum duty cycle (applies to automatic 
+	 * but rather keep going at minimum duty cycle (applies to automatic
 	 * fan control mode only).
 	 */
 	result = smbus_write_byte(adt7463, 0x62, 0xc0);
diff --git a/src/mainboard/tyan/s2881/mptable.c b/src/mainboard/tyan/s2881/mptable.c
index ca75c51a93..a51384c641 100644
--- a/src/mainboard/tyan/s2881/mptable.c
+++ b/src/mainboard/tyan/s2881/mptable.c
@@ -30,7 +30,7 @@ static void *smp_write_config_table(void *v)
         unsigned char bus_num;
 
 	int i;
-  
+
         mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
         memset(mc, 0, sizeof(*mc));
 
@@ -51,7 +51,7 @@ static void *smp_write_config_table(void *v)
         smp_write_processors(mc);
 
 	get_bus_conf();
-       
+
 
 /*Bus:          Bus ID  Type*/
         /* define bus and isa numbers */
@@ -60,7 +60,7 @@ static void *smp_write_config_table(void *v)
         }
         smp_write_bus(mc, bus_isa, "ISA   ");
 
-	
+
 /*I/O APICs:	APIC ID	Version	State		Address*/
 	smp_write_ioapic(mc, apicid_8111, 0x11, 0xfec00000);
         {
@@ -82,7 +82,7 @@ static void *smp_write_config_table(void *v)
                 }
 
 	}
-  
+
 /*I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
 */	smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, apicid_8111, 0x0);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x1, apicid_8111, 0x1);
@@ -96,7 +96,7 @@ static void *smp_write_config_table(void *v)
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xd, apicid_8111, 0xd);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xe, apicid_8111, 0xe);
 	smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0xf, apicid_8111, 0xf);
-	
+
 //8111 LPC ????
         smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|0, apicid_8111, 0x13);
 
diff --git a/src/mainboard/tyan/s2881/resourcemap.c b/src/mainboard/tyan/s2881/resourcemap.c
index cecb790795..23ab936a5b 100644
--- a/src/mainboard/tyan/s2881/resourcemap.c
+++ b/src/mainboard/tyan/s2881/resourcemap.c
@@ -144,7 +144,7 @@ static void setup_s2881_resource_map(void)
 	 *	   1 = base/limit registers i are read-only
 	 * [ 7: 4] Reserved
 	 * [31: 8] Memory-Mapped I/O Base Address i (39-16)
-	 *	   This field defines the upper address bits of a 40bit address 
+	 *	   This field defines the upper address bits of a 40bit address
 	 *	   that defines the start of memory-mapped I/O region i
 	 */
 	PCI_ADDR(0, 0x18, 1, 0x80), 0x000000f0, 0x00000000,
@@ -200,7 +200,7 @@ static void setup_s2881_resource_map(void)
 	 * [ 3: 2] Reserved
 	 * [ 4: 4] VGA Enable
 	 *	   0 = VGA matches Disabled
-	 *	   1 = matches all address < 64K and where A[9:0] is in the 
+	 *	   1 = matches all address < 64K and where A[9:0] is in the
 	 *	       range 3B0-3BB or 3C0-3DF independen of the base & limit registers
 	 * [ 5: 5] ISA Enable
 	 *	   0 = ISA matches Disabled
@@ -208,7 +208,7 @@ static void setup_s2881_resource_map(void)
 	 *	       from matching agains this base/limit pair
 	 * [11: 6] Reserved
 	 * [24:12] PCI I/O Base i
-	 *	   This field defines the start of PCI I/O region n 
+	 *	   This field defines the start of PCI I/O region n
 	 * [31:25] Reserved
 	 */
 	PCI_ADDR(0, 0x18, 1, 0xC0), 0xFE000FCC, 0x00000003,
diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c
index 1310c8e99b..0a63486ffb 100644
--- a/src/mainboard/tyan/s2881/romstage.c
+++ b/src/mainboard/tyan/s2881/romstage.c
@@ -3,7 +3,7 @@
 #if CONFIG_LOGICAL_CPUS==1
 #define SET_NB_CFG_54 1
 #endif
- 
+
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -117,7 +117,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         }
 
 //	post_code(0x32);
-	
+
  	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
         uart_init();
         console_init();