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authorStefan Reinauer <stepan@openbios.org>2004-04-24 23:01:33 +0000
committerStefan Reinauer <stepan@openbios.org>2004-04-24 23:01:33 +0000
commit2ab88d1179d46e4e5242286b59ee8519fa79bb05 (patch)
tree1a23808e0716943ec7a159254b19dc03a7713ac4 /src/mainboard/tyan/s2880
parentf05dcb8d7afb3716959b94b8dac20ee551762624 (diff)
Major merge of YhLu's code from 2004/04/20: add s2875, various other updates,
cleanups. Drop "driver" code from mainboard directories and use them from the driver directory instead git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2880')
-rw-r--r--src/mainboard/tyan/s2880/Config.lb5
-rw-r--r--src/mainboard/tyan/s2880/auto.c16
2 files changed, 10 insertions, 11 deletions
diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb
index 892429686d..fd38465f3b 100644
--- a/src/mainboard/tyan/s2880/Config.lb
+++ b/src/mainboard/tyan/s2880/Config.lb
@@ -32,7 +32,7 @@ default LB_CKS_LOC=123
driver mainboard.o
-driver lsi_scsi.o
+dir ../common/lsi_scsi
#driver adaptec_scsi.o
#driver promise_sata.o
#driver intel_nic.o
@@ -126,8 +126,7 @@ makerule ./auto.E
end
makerule ./auto.inc
depends "./romcc ./auto.E"
- action "./romcc -O -mcpu=k8 -o auto.inc --label-prefix=auto ./auto.E"
-# action "./romcc -mcpu=k8 -O ./auto.E > auto.inc"
+ action "./romcc -O2 -mcpu=k8 -o auto.inc --label-prefix=auto ./auto.E"
end
mainboardinit cpu/k8/enable_mmx_sse.inc
mainboardinit ./auto.inc
diff --git a/src/mainboard/tyan/s2880/auto.c b/src/mainboard/tyan/s2880/auto.c
index 6ad2489124..afe399ae72 100644
--- a/src/mainboard/tyan/s2880/auto.c
+++ b/src/mainboard/tyan/s2880/auto.c
@@ -39,24 +39,24 @@ static void soft_reset(void)
set_bios_reset();
pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
}
-#define REV_B_RESET 0
static void memreset_setup(void)
{
-#if REV_B_RESET==1
+ if (is_cpu_pre_c0()) {
outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=0
-#else
+ }
+ else {
outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 16); //REVC_MEMRST_EN=1
-#endif
+ }
outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 17);
}
static void memreset(int controllers, const struct mem_controller *ctrl)
{
+ if (is_cpu_pre_c0()) {
udelay(800);
-#if REV_B_RESET==1
outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 17); //REVB_MEMRST_L=1
-#endif
udelay(90);
+ }
}
static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
@@ -114,7 +114,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
}
/* include mainboard specific ht code */
-#include "hypertransport.c"
+//#include "hypertransport.c"
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
@@ -166,7 +166,7 @@ static void main(void)
needs_reset = setup_coherent_ht_domain();
needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0x80);
if (needs_reset) {
- print_info("ht reset -\r\t");
+ print_info("ht reset -\r\n");
soft_reset();
}