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authorYinghai Lu <yinghailu@gmail.com>2005-07-08 02:49:49 +0000
committerYinghai Lu <yinghailu@gmail.com>2005-07-08 02:49:49 +0000
commit13f1c2af8be2cd7f7e99a678f5d428a65b771811 (patch)
tree27cad5581f1fa150f573149d48e82f70ba1b1d9f /src/mainboard/tyan/s2735
parent14cde9e96a777f9d75016a13b23fab0480515f58 (diff)
eric patch
1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2735')
-rw-r--r--src/mainboard/tyan/s2735/Config.lb2
-rw-r--r--src/mainboard/tyan/s2735/Options.lb14
-rw-r--r--src/mainboard/tyan/s2735/reset.c5
3 files changed, 9 insertions, 12 deletions
diff --git a/src/mainboard/tyan/s2735/Config.lb b/src/mainboard/tyan/s2735/Config.lb
index 568bc9b211..3977db16b9 100644
--- a/src/mainboard/tyan/s2735/Config.lb
+++ b/src/mainboard/tyan/s2735/Config.lb
@@ -43,7 +43,7 @@ arch i386 end
driver mainboard.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
-#object reset.o
+object reset.o
if USE_DCACHE_RAM
if CONFIG_USE_INIT
diff --git a/src/mainboard/tyan/s2735/Options.lb b/src/mainboard/tyan/s2735/Options.lb
index 16b23a66bd..ada1beb593 100644
--- a/src/mainboard/tyan/s2735/Options.lb
+++ b/src/mainboard/tyan/s2735/Options.lb
@@ -3,9 +3,6 @@ uses HAVE_PIRQ_TABLE
uses USE_FALLBACK_IMAGE
uses HAVE_FALLBACK_BOOT
uses HAVE_HARD_RESET
-uses HARD_RESET_BUS
-uses HARD_RESET_DEVICE
-uses HARD_RESET_FUNCTION
uses IRQ_SLOT_COUNT
uses HAVE_OPTION_TABLE
uses CONFIG_MAX_CPUS
@@ -92,21 +89,16 @@ default HAVE_FALLBACK_BOOT=1
##
default HAVE_HARD_RESET=1
-default HARD_RESET_BUS=1
-default HARD_RESET_DEVICE=4
-default HARD_RESET_FUNCTION=0
-
## Delay timer options
##
default CONFIG_UDELAY_TSC=1
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
-
##
## Build code to export a programmable irq routing table
##
default HAVE_PIRQ_TABLE=1
-default IRQ_SLOT_COUNT=11
+default IRQ_SLOT_COUNT=15
##
## Build code to export an x86 MP table
@@ -148,8 +140,8 @@ default SERIAL_CPU_INIT=0
## enable CACHE_AS_RAM specifics
##
default USE_DCACHE_RAM=1
-default DCACHE_RAM_BASE=0xF2000000
-#default DCACHE_RAM_BASE=0xcf000
+#default DCACHE_RAM_BASE=0xF2000000
+default DCACHE_RAM_BASE=0xcf000
default DCACHE_RAM_SIZE=0x1000
#default CONFIG_USE_INIT=1
diff --git a/src/mainboard/tyan/s2735/reset.c b/src/mainboard/tyan/s2735/reset.c
new file mode 100644
index 0000000000..3cc3d54988
--- /dev/null
+++ b/src/mainboard/tyan/s2735/reset.c
@@ -0,0 +1,5 @@
+
+void hard_reset(void)
+{
+ i82801er_hard_reset();
+}