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authorJagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>2016-08-04 10:17:22 -0700
committerMartin Roth <martinroth@google.com>2016-08-08 17:37:03 +0200
commit5d3d69ca950c728878d3fb0a26bc3be0b91bf406 (patch)
tree647f990c4e38fff3734a9a7ab2a4cfa4f0826ee9 /src/mainboard/tyan/Kconfig
parent09ae1d533edcb2db88f5b5d13984343b90cbe18c (diff)
google/reef: Configure SDIO D1 to enable SCS Power Gating
SDIO D1 pin needs to be configured as Native mode to enable SCS Power Gating. BUG=chrome-os-partner:54251 TEST=Verify SCS Power Gating Change-Id: Ic33b26443203217678e11d195eb965a7e628ad82 Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Reviewed-on: https://review.coreboot.org/16062 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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