diff options
| author | Nathan Williams <nathan@traverse.com.au> | 2010-05-20 07:35:17 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-05-20 07:35:17 +0000 |
| commit | 1a169d2a46047e72e34977b74884b8d9d250f124 (patch) | |
| tree | 891a6d3b0af976217ac65c23886bbdf24e1a963a /src/mainboard/traverse/geos/devicetree.cb | |
| parent | 6d77252e743424ee7f80ad0920003b46aa29727a (diff) | |
Add support for the Traverse Technologies Geos mainboard.
This board is similar to the AMD Norwich mainboard.
Signed-off-by: Nathan Williams <nathan@traverse.com.au>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5574 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/traverse/geos/devicetree.cb')
| -rw-r--r-- | src/mainboard/traverse/geos/devicetree.cb | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/src/mainboard/traverse/geos/devicetree.cb b/src/mainboard/traverse/geos/devicetree.cb new file mode 100644 index 0000000000..eab70c7c78 --- /dev/null +++ b/src/mainboard/traverse/geos/devicetree.cb @@ -0,0 +1,40 @@ +chip northbridge/amd/lx + device pci_domain 0 on + device pci 1.0 on end # Northbridge + device pci 1.1 on end # Graphics + chip southbridge/amd/cs5536 + # IRQ 12 and 1 unmasked, Keyboard and Mouse IRQs. OK + # SIRQ Mode = Active(Quiet) mode. Save power.... + # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse IRQs. OK + register "lpc_serirq_enable" = "0x00001002" + register "lpc_serirq_polarity" = "0x0000EFFD" + register "lpc_serirq_mode" = "1" + register "enable_gpio_int_route" = "0x0D0C0700" + register "enable_ide_nand_flash" = "0" # 0:ide mode, 1:flash + register "enable_USBP4_device" = "0" #0: host, 1:device + register "enable_USBP4_overcurrent" = "0" #0:off, xxxx:overcurrent setting CS5536 Data Book (pages 380-381) + register "com1_enable" = "1" + register "com1_address" = "0x3F8" + register "com1_irq" = "4" + register "com2_enable" = "0" + register "com2_address" = "0x2F8" + register "com2_irq" = "3" + register "unwanted_vpci[0]" = "0" # End of list has a zero + device pci a.0 on end # Ethernet 0 + device pci b.0 on end # Ethernet 1 + device pci c.0 on end # Xilinx + device pci d.0 on end # Mini PCI + device pci f.0 on end # ISA Bridge + device pci f.2 on end # IDE Controller + device pci f.3 on end # Audio + device pci f.4 on end # OHCI + device pci f.5 on end # EHCI + end + end + # APIC cluster is late CPU init. + device lapic_cluster 0 on + chip cpu/amd/model_lx + device lapic 0 on end + end + end +end |