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authorFurquan Shaikh <furquan@google.com>2013-07-22 16:18:31 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 08:04:10 +0100
commit6b19071ffb89dbb68196b7f3b088d87d4fad9e80 (patch)
treecb68ceaff1796a7798288eba1f6472154642b76a /src/mainboard/traverse/geos/cmos.layout
parent3d9b5a29317b9df63698abbcf743ff4d15b2892a (diff)
FUI: Fill in link_m and link_n values
... based on the EDID detailed timing values for pixel_clock and link_clock. Two undocumented registers 0x6f040 and 0x6f044 correspond to link_m and link_n respectively. Other two undocumented registers 0x6f030 and 0x6f034 correspond to data_m and data_n respectively. Calculations are based on the intel_link_compute_m_n from linux kernel. Currently, the value for 0x6f030 does not come up right with our calculations. Hence, set to hard-coded value. Change-Id: I40ff411729d0a61759164c3c1098504973f9cf5e Reviewed-on: https://gerrit.chromium.org/gerrit/62915 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/4381 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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