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authorStefan Reinauer <stepan@coresystems.de>2008-01-18 15:08:58 +0000
committerStefan Reinauer <stepan@openbios.org>2008-01-18 15:08:58 +0000
commitf8ee1806ac524bc782c93eccc59ee3c929abddb9 (patch)
tree7daab6b3aa82476a10d38fbf68068f4a409d2ce9 /src/mainboard/totalimpact
parent7e61e45402aba2b90997f4f02ca8266cf65a229a (diff)
Rename almost all occurences of LinuxBIOS to coreboot.
Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/totalimpact')
-rw-r--r--src/mainboard/totalimpact/briq/Config.lb2
-rw-r--r--src/mainboard/totalimpact/briq/Options.lb6
-rw-r--r--src/mainboard/totalimpact/briq/briQ7400.cfg2
3 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/totalimpact/briq/Config.lb b/src/mainboard/totalimpact/briq/Config.lb
index ba91f2dfcb..968471c553 100644
--- a/src/mainboard/totalimpact/briq/Config.lb
+++ b/src/mainboard/totalimpact/briq/Config.lb
@@ -46,4 +46,4 @@ end
## Build the objects we have code for in this directory.
##
-addaction linuxbios.a "$(CROSS_COMPILE)ranlib linuxbios.a"
+addaction coreboot.a "$(CROSS_COMPILE)ranlib coreboot.a"
diff --git a/src/mainboard/totalimpact/briq/Options.lb b/src/mainboard/totalimpact/briq/Options.lb
index a9396d8d45..f3a08afd6b 100644
--- a/src/mainboard/totalimpact/briq/Options.lb
+++ b/src/mainboard/totalimpact/briq/Options.lb
@@ -39,7 +39,7 @@ uses CONFIG_SYS_CLK_FREQ
uses MAINBOARD
uses MAINBOARD_VENDOR
uses MAINBOARD_PART_NUMBER
-uses LINUXBIOS_EXTRA_VERSION
+uses COREBOOT_EXTRA_VERSION
uses CROSS_COMPILE
uses CC
uses HOSTCC
@@ -108,11 +108,11 @@ default _RESET=_ROMBASE+0x100
## Exception vectors (other than reset vector)
default _EXCEPTION_VECTORS=_RESET+0x100
-## Start of linuxBIOS in the boot rom
+## Start of coreboot in the boot rom
## = _RESET + exeception vector table size
default _ROMSTART=_RESET+0x3100
-## LinuxBIOS C code runs at this location in RAM
+## Coreboot C code runs at this location in RAM
default _RAMBASE=0x00100000
default _RAMSTART=0x00100000
diff --git a/src/mainboard/totalimpact/briq/briQ7400.cfg b/src/mainboard/totalimpact/briq/briQ7400.cfg
index 20a438703e..22c64f7c77 100644
--- a/src/mainboard/totalimpact/briq/briQ7400.cfg
+++ b/src/mainboard/totalimpact/briq/briQ7400.cfg
@@ -148,7 +148,7 @@ CHIPTYPE AM29F ;Flash type (AM29F | AM29BX8 | AM29BX16 | I28BX8 | I28BX16
CHIPSIZE 0x100000 ;The size of one flash chip in bytes (e.g. Am29LV800BB = 0x100000)
BUSWIDTH 8 ;The width of the flash memory bus in bits (8 | 16 | 32 | 64)
;WORKSPACE 0x00000000 ;workspace in SDRAM
-FILE linuxbios.rom
+FILE coreboot.rom
FORMAT ELF
ERASE 0xFFF00000 ;erase sector 0 of flash
ERASE 0xFFF10000 ;erase sector 1 of flash