- First stab at getting the ppc ports building and working.

- The sandpointx3+altimus has been consolidated into one directory for now.
- Added support for having different versions of the pci access functions
  on a per bus basis if needed.
  Hopefully I have not broken something inadvertently.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 18 insertions, 4 deletions

diff --git a/src/mainboard/totalimpact/briq/Config.lb b/src/mainboard/totalimpact/briq/Config.lb
index 775aad36f8..ba91f2dfcb 100644
--- a/src/mainboard/totalimpact/briq/Config.lb
+++ b/src/mainboard/totalimpact/briq/Config.lb
@@ -16,17 +16,31 @@ object clock.o
 arch ppc end
 
 if CONFIG_BRIQ_750FX
-	chip cpu/ppc/ppc7xx device pnp 0.0 on end end
+dir /cpu/ppc/ppc7xx
 end
 if CONFIG_BRIQ_7400
-	chip cpu/ppc/mpc74xx device pnp 0.0 on end  end
+dir /cpu/ppc/mpc74xx
 end
 
 ##
 ## Include the secondary Configuration files 
 ##
-chip northbridge/ibm/cpc710 device pnp 0.0 on end end
-chip southbridge/winbond/w83c553 device pnp 0.0 on end end
+chip northbridge/ibm/cpc710
+	device pci_domain 0 on # 32bit pci bridge
+		device pci 0.0 on 
+			chip southbridge/winbond/w83c553
+				# FIXME  The function numbers are ok but the device id is wrong here!
+				device pci 0.0 on end # pci to isa bridge
+				device pci 0.1 on end # pci ide controller
+			end
+		end
+	end
+	device cpu_bus 0 on 
+	#	chip cpu/ppc/ppc7xx
+	#		device cpu 0 on end
+	#	end
+	end
+end
 
 ##
 ## Build the objects we have code for in this directory.