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authorAlicja Michalska <ahplka19@gmail.com>2024-09-01 20:06:30 +0200
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2024-11-21 15:49:22 +0000
commit3d79bced9549922c8c4a8611327818c32d4feda5 (patch)
tree8f63ae13cec31d2e7387561823f0c2c2e32ef67e /src/mainboard/topton/adl/dsdt.asl
parent0c43a65550b6120069c6ea78f1e57ae7a1c11295 (diff)
mb/topton/adl: Add initial support for X2F N100 FW appliance
X2F-N100 is an embedded device/firewall with Intel N100 SoC and 4x 2.5Gb Intel I226-V NICs. Currently tested and working: - Payload (EDK2) - Suspend (S3 state) - All USB ports - 4x NICs - M.2 NVME - mPCI-E (WiFi/modem) - 4G USB modem in mPCI-E slot - PCI-E passtrough to VMs (NICs) - HDMI/DP output + HDA audio OS: - Alpine Linux - Windows 11 Pro (from USB) Untested, looks sane: - Internal USB port on M.2 slot marked as "5G_USB" Broken/TODO: - SATA EDK2 reports "Unsupported", drive's not detected. - Suspend in Windows (statements dreamed up by the utterly deranged) Change-Id: Ic5cd2060c1635b79cb28ffe294220b63ad2bab65 Signed-off-by: Alicja Michalska <alicja.michalska@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84175 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Alicja Michalska <ahplka19@gmail.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/mainboard/topton/adl/dsdt.asl')
-rw-r--r--src/mainboard/topton/adl/dsdt.asl25
1 files changed, 25 insertions, 0 deletions
diff --git a/src/mainboard/topton/adl/dsdt.asl b/src/mainboard/topton/adl/dsdt.asl
new file mode 100644
index 0000000000..132ed37581
--- /dev/null
+++ b/src/mainboard/topton/adl/dsdt.asl
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <acpi/acpi.h>
+
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ ACPI_DSDT_REV_2,
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20110725
+)
+{
+ #include <acpi/dsdt_top.asl>
+ #include <soc/intel/common/block/acpi/acpi/platform.asl>
+ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <cpu/intel/common/acpi/cpu.asl>
+
+ Device (\_SB.PCI0) {
+ #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/alderlake/acpi/southbridge.asl>
+ }
+
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
+}