Drop GX1, CS5330 and related boards

There is no Cache As Ram for these boards, let's get rid of them.

Change-Id: Ib41f8cd64fc9a440838aea86076d6514aacb301c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/7117
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

5 files changed, 0 insertions, 293 deletions

diff --git a/src/mainboard/televideo/tc7020/Kconfig b/src/mainboard/televideo/tc7020/Kconfig
deleted file mode 100644
index 6d77f5901f..0000000000
--- a/src/mainboard/televideo/tc7020/Kconfig
+++ /dev/null
@@ -1,45 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; version 2 of the License.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-if BOARD_TELEVIDEO_TC7020
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select CPU_AMD_GEODE_GX1
-	select NORTHBRIDGE_AMD_GX1
-	select SOUTHBRIDGE_AMD_CS5530
-	select SUPERIO_NSC_PC97317
-	select ROMCC
-	select HAVE_PIRQ_TABLE
-	select PIRQ_ROUTE
-	select UDELAY_TSC
-	select BOARD_ROMSIZE_KB_256
-
-config MAINBOARD_DIR
-	string
-	default televideo/tc7020
-
-config MAINBOARD_PART_NUMBER
-	string
-	default "TC7020"
-
-config IRQ_SLOT_COUNT
-	int
-	default 3
-
-endif # BOARD_TELEVIDEO_TC7020
diff --git a/src/mainboard/televideo/tc7020/board_info.txt b/src/mainboard/televideo/tc7020/board_info.txt
deleted file mode 100644
index 93e6c5c6bf..0000000000
--- a/src/mainboard/televideo/tc7020/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: settop
-Board URL: http://www.televideo.com/TeleVideo/TC7000_WinCE_Series.htm
diff --git a/src/mainboard/televideo/tc7020/devicetree.cb b/src/mainboard/televideo/tc7020/devicetree.cb
deleted file mode 100644
index d1fa6bd271..0000000000
--- a/src/mainboard/televideo/tc7020/devicetree.cb
+++ /dev/null
@@ -1,57 +0,0 @@
-chip northbridge/amd/gx1		# Northbridge
-  device domain 0 on		# PCI domain
-    device pci 0.0 on end		# Host bridge
-    chip southbridge/amd/cs5530		# Southbridge
-      device pci 12.0 on		# ISA bridge
-        chip superio/nsc/pc97317	# Super I/O
-          device pnp 2e.0 on		# PS/2 keyboard
-            io 0x60 = 0x60
-            io 0x62 = 0x64
-            irq 0x70 = 1
-          end
-          device pnp 2e.1 on		# PS/2 mouse
-            irq 0x70 = 12
-          end
-          device pnp 2e.2 on		# RTC, Advanced power control (APC)
-            io 0x60 = 0x70
-            irq 0x70 = 8
-          end
-          device pnp 2e.3 off		# Floppy (N/A on this board)
-            io 0x60 = 0x3f0
-            irq 0x70 = 6
-            drq 0x74 = 2
-          end
-          device pnp 2e.4 on		# Parallel port
-            io 0x60 = 0x378
-            irq 0x70 = 7
-          end
-          device pnp 2e.5 on		# COM2
-            io 0x60 = 0x2f8
-            irq 0x70 = 3
-          end
-          device pnp 2e.6 on		# COM1
-            io 0x60 = 0x3f8
-            irq 0x70 = 4
-          end
-          device pnp 2e.7 on		# GPIO
-            io 0x60 = 0xe0
-          end
-          device pnp 2e.8 on		# Power management
-            io 0x60 = 0xe8
-          end
-        end
-      end
-      device pci 12.1 off end		# SMI
-      device pci 12.2 on end		# IDE
-      device pci 12.3 on end		# Audio
-      device pci 12.4 on end		# VGA (onboard)
-      device pci 13.0 on end		# USB
-      device pci 14.0 on end		# MiniPCI slot
-      device pci 15.0 on end		# Ethernet (onboard)
-      register "ide0_enable" = "1"
-      register "ide1_enable" = "0"	# Not available/needed on this board
-    end
-  end
-  chip cpu/amd/geode_gx1		# CPU
-  end
-end
diff --git a/src/mainboard/televideo/tc7020/irq_tables.c b/src/mainboard/televideo/tc7020/irq_tables.c
deleted file mode 100644
index 5eef0c01e2..0000000000
--- a/src/mainboard/televideo/tc7020/irq_tables.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
- * Copyright (C) 2007 Kenji Noguchi <tokyo246@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <arch/pirq_routing.h>
-#include <console/console.h>
-#include <device/pci.h>
-
-/* Platform IRQs */
-#define PIRQA 11
-#define PIRQB 10
-#define PIRQC  9
-#define PIRQD 12
-
-/* Link */
-#define LINK_PIRQA 1
-#define LINK_PIRQB 2
-#define LINK_PIRQC 3
-#define LINK_PIRQD 4
-#define LINK_NONE 0
-
-/* Map */
-#define IRQ_BITMAP_LINKA (1 << PIRQA)
-#define IRQ_BITMAP_LINKB (1 << PIRQB)
-#define IRQ_BITMAP_LINKC (1 << PIRQC)
-#define IRQ_BITMAP_LINKD (1 << PIRQD)
-#define IRQ_BITMAP_NOLINK 0x0
-
-#define EXCLUSIVE_PCI_IRQS (IRQ_BITMAP_LINKA | IRQ_BITMAP_LINKB | IRQ_BITMAP_LINKC | IRQ_BITMAP_LINKD)
-
-static const struct irq_routing_table intel_irq_routing_table = {
-	PIRQ_SIGNATURE,	 /* u32 signature */
-	PIRQ_VERSION,	 /* u16 version */
-	32+16*CONFIG_IRQ_SLOT_COUNT,	 /* There can be a total of CONFIG_IRQ_SLOT_COUNT devices on the bus */
-	0x00,		 /* Where the interrupt router lies (bus) */
-	(0x12<<3)|0x0,	 /* Where the interrupt router lies (dev) */
-	EXCLUSIVE_PCI_IRQS,		 /* IRQs devoted exclusively to PCI usage */
-	0x1078,		 /* Vendor */
-	0x1,		 /* Device */
-	0,		 /* Miniport data */
-	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
-	0x60,		 /* u8 checksum. This has to be set to some
-			    value that would give 0 after the sum of all
-			    bytes for this structure (including checksum) */
-
-	.slots = {
-		[0] = {
-			.slot = 0x0,	/* means also "on board" */
-			.bus = 0x00,
-			.devfn = (0x13<<3)|0x0,	/* 0x13 is USB OHCI */
-			.irq = {
-				[0] = {	/* <-- 0 means this is INTA# output from the device or slot */
-					.link = LINK_PIRQA,
-					.bitmap = IRQ_BITMAP_LINKA
-				},
-				[1] = {	/* <-- 1 means this is INTB# output from the device or slot */
-					.link = LINK_NONE,
-					.bitmap = IRQ_BITMAP_NOLINK
-				},
-				[2] = {	/* <-- 2 means this is INTC# output from the device or slot */
-					.link = LINK_NONE,
-					.bitmap = IRQ_BITMAP_NOLINK
-				},
-				[3] = {	/* <-- 3 means this is INTD# output from the device or slot */
-					.link = LINK_NONE,
-					.bitmap = IRQ_BITMAP_NOLINK
-				}
-			}
-		},
-
-		[1] = {
-			.slot = 0x0,	/* means also "on board" */
-			.bus = 0x00,
-			.devfn = (0x15<<3)|0x0,	/* 0x15 is NSC Network device */
-			.irq = {
-				[0] = {	/* <-- 0 means this is INTA# output from the device or slot */
-					.link = LINK_PIRQB,
-					.bitmap = IRQ_BITMAP_LINKB
-				},
-				[1] = {	/* <-- 1 means this is INTB# output from the device or slot */
-					.link = LINK_NONE,
-					.bitmap = IRQ_BITMAP_NOLINK
-				},
-				[2] = {	/* <-- 2 means this is INTC# output from the device or slot */
-					.link = LINK_NONE,
-					.bitmap = IRQ_BITMAP_NOLINK
-				},
-				[3] = {	/* <-- 3 means this is INTD# output from the device or slot */
-					.link = LINK_NONE,
-					.bitmap = IRQ_BITMAP_NOLINK
-				}
-			}
-		},
-
-		[2] = {
-			.slot = 0x1,	/* This is a Mini PCI slot */
-			.bus = 0x00,
-			.devfn = (0x14<<3)|0x0,
-			.irq = {
-				[0] = {	/* <-- 0 means this is INTA# output from the device or slot */
-					.link = LINK_PIRQC,
-					.bitmap = IRQ_BITMAP_LINKC
-				},
-				[1] = {	/* <-- 1 means this is INTB# output from the device or slot */
-					/* NEEDSWORK: not confirmed. No device to test which uses both INTA and INTB  */
-					.link = LINK_PIRQD,
-					.bitmap = IRQ_BITMAP_LINKD
-				},
-				[2] = {	/* No INTC# for Mini PCI */
-					.link = LINK_NONE,
-					.bitmap = IRQ_BITMAP_NOLINK
-				},
-				[3] = {	/* No INTD# for Mini PCI */
-					.link = LINK_NONE,
-					.bitmap = IRQ_BITMAP_NOLINK
-				}
-			}
-		},
-	}
-};
-
-/**
- * Copy the IRQ routing table to memory.
- *
- * @param addr Destination address (between 0xF0000...0x100000).
- * @return The end address of the pirq routing table in memory.
- */
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
-	return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/televideo/tc7020/romstage.c b/src/mainboard/televideo/tc7020/romstage.c
deleted file mode 100644
index 158a45fbde..0000000000
--- a/src/mainboard/televideo/tc7020/romstage.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <console/console.h>
-#include "northbridge/amd/gx1/raminit.c"
-#include "superio/nsc/pc97317/early_serial.c"
-#include "cpu/x86/bist.h"
-#include "southbridge/amd/cs5530/enable_rom.c"
-
-#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
-	pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	console_init();
-	report_bist_failure(bist);
-	cs5530_enable_rom();
-	sdram_init();
-}