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authorElyes HAOUAS <ehaouas@noos.fr>2016-09-19 09:47:16 -0600
committerPatrick Georgi <pgeorgi@google.com>2016-09-20 21:55:12 +0200
commita5aad2ed68690d748c650f69a2e39f91a7b02608 (patch)
tree7ad419bc13bcf13e546481558aa1a4c923821c07 /src/mainboard/technexion/tim8690
parent531b87ac4e8038aedf9c44c29fe2c1fc31adb346 (diff)
src/mainboard/lenovo-winent: Add space around operators
Change-Id: Iab2a879ebdea9d93ef5eb7e3abf875036c1e1cb4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16641 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/technexion/tim8690')
-rw-r--r--src/mainboard/technexion/tim8690/mainboard.c2
-rw-r--r--src/mainboard/technexion/tim8690/mptable.c2
-rw-r--r--src/mainboard/technexion/tim8690/romstage.c4
3 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/technexion/tim8690/mainboard.c b/src/mainboard/technexion/tim8690/mainboard.c
index 939becfa78..9e1c58d29e 100644
--- a/src/mainboard/technexion/tim8690/mainboard.c
+++ b/src/mainboard/technexion/tim8690/mainboard.c
@@ -59,7 +59,7 @@ static void enable_onboard_nic(void)
byte |= ( 1 << 7);
pci_write_config8(sm_dev, 0x9a, byte);
- byte=pm_ioread(0x59);
+ byte = pm_ioread(0x59);
byte &= ~( 1<< 5);
pm_iowrite(0x59,byte);
diff --git a/src/mainboard/technexion/tim8690/mptable.c b/src/mainboard/technexion/tim8690/mptable.c
index 39192b071c..8895163651 100644
--- a/src/mainboard/technexion/tim8690/mptable.c
+++ b/src/mainboard/technexion/tim8690/mptable.c
@@ -69,7 +69,7 @@ static void *smp_write_config_table(void *v)
dword = pci_read_config32(dev, 0xac);
dword &= ~(7 << 26);
dword |= 6 << 26; /* 0: INTA, ...., 7: INTH */
- /* dword |= 1<<22; PIC and APIC co exists */
+ /* dword |= 1 << 22; PIC and APIC co exists */
pci_write_config32(dev, 0xac, dword);
/*
diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c
index e052d923a5..b1805a9d8f 100644
--- a/src/mainboard/technexion/tim8690/romstage.c
+++ b/src/mainboard/technexion/tim8690/romstage.c
@@ -111,7 +111,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
cpuid1 = cpuid(0x80000007);
if ((cpuid1.edx & 0x6) == 0x6 ) {
/* Read FIDVID_STATUS */
- msr=rdmsr(0xc0010042);
+ msr = rdmsr(0xc0010042);
printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
enable_fid_change();
@@ -119,7 +119,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
init_fidvid_bsp(bsp_apicid);
/* show final fid and vid */
- msr=rdmsr(0xc0010042);
+ msr = rdmsr(0xc0010042);
printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo);
} else {
printk(BIOS_DEBUG, "Changing FIDVID not supported\n");