diff options
| author | Felix Singer <felixsinger@posteo.net> | 2021-12-05 03:13:37 +0100 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2021-12-09 22:00:23 +0000 |
| commit | 2aa1ff4eeae43869a6b6ca0036ace536915812c9 (patch) | |
| tree | 228ab8bebe78285f82aeecb22373175fe93bd1a7 /src/mainboard/system76 | |
| parent | 8474f4dc9bfd46bcb111cd3257006057b46d7f08 (diff) | |
soc/intel/tigerlake: Hook up DPTF device to devicetree
Hook up `Device4Enable` FSP setting to devicetree state and drop its
redundant devicetree setting `Device4Enable`.
The following mainboards enable the DPTF device in the devicetree
despite `Device4Enable` is not being set.
* google/deltaur
Thus, set it to off to keep the current state unchanged.
Change-Id: Ic7636fc4f63d4beab92e742a6882ac55af2565bc
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59886
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/system76')
| -rw-r--r-- | src/mainboard/system76/darp7/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/system76/galp5/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/system76/gaze16/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/system76/lemp10/devicetree.cb | 4 | ||||
| -rw-r--r-- | src/mainboard/system76/oryp8/devicetree.cb | 4 |
5 files changed, 5 insertions, 15 deletions
diff --git a/src/mainboard/system76/darp7/devicetree.cb b/src/mainboard/system76/darp7/devicetree.cb index 7a3e072236..dc369adc8e 100644 --- a/src/mainboard/system76/darp7/devicetree.cb +++ b/src/mainboard/system76/darp7/devicetree.cb @@ -105,9 +105,7 @@ chip soc/intel/tigerlake register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref peg on # PCIe PEG0 x4, Clock 0 (SSD1) register "PcieClkSrcUsage[0]" = "0x40" diff --git a/src/mainboard/system76/galp5/devicetree.cb b/src/mainboard/system76/galp5/devicetree.cb index aabeedbf6b..3764d07658 100644 --- a/src/mainboard/system76/galp5/devicetree.cb +++ b/src/mainboard/system76/galp5/devicetree.cb @@ -105,9 +105,7 @@ chip soc/intel/tigerlake register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref peg on # PCIe PEG0 x4, Clock 0 (SSD1) register "PcieClkSrcUsage[0]" = "0x40" diff --git a/src/mainboard/system76/gaze16/devicetree.cb b/src/mainboard/system76/gaze16/devicetree.cb index f5f216cc4b..8b43202860 100644 --- a/src/mainboard/system76/gaze16/devicetree.cb +++ b/src/mainboard/system76/gaze16/devicetree.cb @@ -96,9 +96,7 @@ chip soc/intel/tigerlake register "DdiPortBHpd" = "1" register "DdiPortBDdc" = "1" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref gna on end device ref north_xhci on # TODO: No TBT, but needed for USB 2.0 on Type-C port? diff --git a/src/mainboard/system76/lemp10/devicetree.cb b/src/mainboard/system76/lemp10/devicetree.cb index 2c03e60d81..21928ec089 100644 --- a/src/mainboard/system76/lemp10/devicetree.cb +++ b/src/mainboard/system76/lemp10/devicetree.cb @@ -105,9 +105,7 @@ chip soc/intel/tigerlake register "gfx" = "GMA_DEFAULT_PANEL(0)" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref peg on # PCIe PEG0 x4, Clock 3 (SSD1) # Despite the name, SSD2_CLKREQ# is used for SSD1 diff --git a/src/mainboard/system76/oryp8/devicetree.cb b/src/mainboard/system76/oryp8/devicetree.cb index 4263806b34..e6372fd8ab 100644 --- a/src/mainboard/system76/oryp8/devicetree.cb +++ b/src/mainboard/system76/oryp8/devicetree.cb @@ -110,9 +110,7 @@ chip soc/intel/tigerlake register "DdiPortAHpd" = "1" register "DdiPortADdc" = "0" end - device ref dptf on - register "Device4Enable" = "1" - end + device ref dptf on end device ref peg0 on # PCIe PEG0 x4, Clock 7 (SSD1) register "PcieClkSrcUsage[7]" = "0x40" |