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authorFelix Singer <felixsinger@posteo.net>2020-09-04 09:22:33 +0000
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-09-07 20:08:43 +0000
commitf0a88502597626b4c98d4c330ebcac42dad751af (patch)
tree0e1e175e8c7afed025d78c406a8460697d4cb4e7 /src/mainboard/system76
parenteb9edb143e5e0601e1f5456463e69959c77ea6a8 (diff)
mb/system76/lemp9: Move USB options into devicetree
Change-Id: I3371bed7c2678fbc3304f53af1413a93462933f5 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45108 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
Diffstat (limited to 'src/mainboard/system76')
-rw-r--r--src/mainboard/system76/lemp9/devicetree.cb30
1 files changed, 13 insertions, 17 deletions
diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb
index 6bece6d047..2f36f05b72 100644
--- a/src/mainboard/system76/lemp9/devicetree.cb
+++ b/src/mainboard/system76/lemp9/devicetree.cb
@@ -58,22 +58,6 @@ chip soc/intel/cannonlake
register "PchHdaAudioLinkSndw3" = "0"
register "PchHdaAudioLinkSndw4" = "0"
- # USB
- register "SsicPortEnable" = "0"
-
- # USB2
- register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 1
- register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C port 2
- register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 3
- register "usb2_ports[6]" = "USB2_PORT_MAX(OC_SKIP)" # Camera
- register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
-
- # USB3
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 1
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C port 2
- register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 3
-
-
# PCI Express root port #6 x1, Clock 3 (card reader)
register "PcieRpEnable[5]" = "1"
register "PcieRpLtrEnable[5]" = "1"
@@ -148,7 +132,19 @@ chip soc/intel/cannonlake
device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2
device pci 13.0 off end # Integrated Sensor Hub
- device pci 14.0 on end # USB xHCI
+ device pci 14.0 on # USB xHCI
+ register "SsicPortEnable" = "0"
+ # USB2
+ register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 1
+ register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C port 2
+ register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 3
+ register "usb2_ports[6]" = "USB2_PORT_MAX(OC_SKIP)" # Camera
+ register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
+ # USB3
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 1
+ register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C port 2
+ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 3
+ end
device pci 14.1 off end # USB xDCI (OTG)
chip drivers/intel/wifi # CNVi wifi
register "wake" = "GPE0_PME_B0"