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authorShon Wang <shon.wang@quanta.corp-partner.google.com>2023-07-28 11:27:32 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-07-31 13:56:18 +0000
commit27830d0ec375e49e7e0cb4e26bbc03ea5c3d5a84 (patch)
treea008160fce49f1bd521c95321750a22cd8ea9ed5 /src/mainboard/system76/rpl
parent91f5da477677cc6a7a7d5cdc50f5d2bf71981e44 (diff)
mb/google/brya/var/vell: Disable PCH USB2 phy power gating
The patch disables PCH USB2 Phy power gating to prevent possible display flicker issue for vell board. Please refer Intel doc#723158 for more information. BUG=b:293535284 TEST=build and boot vell Change-Id: I8a4d633fbd362188aedef373e515c7bfe5c4327a Signed-off-by: Shon Wang <shon.wang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76770 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Derek Huang <derekhuang@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
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