diff options
author | Tim Crawford <tcrawford@system76.com> | 2021-01-26 11:50:36 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-28 09:15:00 +0000 |
commit | fdc8fd3602eddabdbbd0d9d87329343160cec337 (patch) | |
tree | a722e6166794af7d2728cc477a81ccdd835f98b9 /src/mainboard/system76/oryp5/romstage.c | |
parent | 1ee8ddc484bf87b99d4ba80f6d4fb99ee043780e (diff) |
mb/system76/oryp5: Add System76 Oryx Pro 5
Tested with TianoCore payload (UefiPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots
- Both NVMe ports
- SATA port
- All USB ports
- Webcam
- Ethernet
- Integrated graphics
- Internal microphone
- S3 suspend/resume
- Flashing with flashrom
- Booting to Ubuntu Linux and Windows
Not working:
- Discrete/Hybrid graphics
- Internal speakers
These two require new drivers to work correctly, which will be added and
enabled later.
Change-Id: Iae6e530dcd52df3642cdfe74b65bfff5aa0dd402
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/system76/oryp5/romstage.c')
-rw-r--r-- | src/mainboard/system76/oryp5/romstage.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/src/mainboard/system76/oryp5/romstage.c b/src/mainboard/system76/oryp5/romstage.c new file mode 100644 index 0000000000..455a2bb919 --- /dev/null +++ b/src/mainboard/system76/oryp5/romstage.c @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/cnl_memcfg_init.h> +#include <soc/romstage.h> + +static const struct cnl_mb_cfg memcfg = { + .spd[0] = { + .read_type = READ_SMBUS, + .spd_spec = {.spd_smbus_address = 0xa0}, + }, + .spd[2] = { + .read_type = READ_SMBUS, + .spd_spec = {.spd_smbus_address = 0xa4}, + }, + .rcomp_resistor = { 121, 75, 100 }, + .rcomp_targets = { 50, 25, 20, 20, 26 }, + .dq_pins_interleaved = 1, + .vref_ca_config = 2, +}; + +void mainboard_memory_init_params(FSPM_UPD *memupd) +{ + // Allow memory speeds higher than 2666 MT/s + memupd->FspmConfig.SaOcSupport = 1; + + cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg); +} |