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authorFelix Singer <felixsinger@posteo.net>2020-12-07 01:28:59 +0100
committerMichael Niewöhner <foss@mniewoehner.de>2020-12-08 21:16:30 +0000
commit1e3b2ce061626e6c5a7d7f89d40a854bac16f3d4 (patch)
treeb4c9e92a814f0cb0d75233d5d1526fbb707a6e8e /src/mainboard/system76/lemp9/devicetree.cb
parent77562cf95e8b5911919fc346949bc17eb32d8b87 (diff)
soc/intel/cannonlake: Align SATA mode names with soc/skl
Align the SATA mode names with soc/skl providing a consistent API. Built clevo/l140cu with BUILD_TIMELESS=1, coreboot.rom remains identical. Change-Id: I54b48462852d7fe0230dde0c272da3d12365d987 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/system76/lemp9/devicetree.cb')
-rw-r--r--src/mainboard/system76/lemp9/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb
index 8e45ebaaa8..1f92fec802 100644
--- a/src/mainboard/system76/lemp9/devicetree.cb
+++ b/src/mainboard/system76/lemp9/devicetree.cb
@@ -113,7 +113,7 @@ chip soc/intel/cannonlake
device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 on # SATA
- register "SataMode" = "Sata_AHCI"
+ register "SataMode" = "SATA_AHCI"
register "SataSalpSupport" = "1"
# Port 2 (J_SSD2)
register "SataPortsEnable[1]" = "1"