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authorTim Crawford <tcrawford@system76.com>2023-07-19 11:39:55 -0600
committerFelix Held <felix-coreboot@felixheld.de>2023-07-25 19:47:13 +0000
commite56c738f323c72574444152dc5365a8feec52118 (patch)
tree3b4199ddbb1ad885fea3e8a9f69df178e1992b54 /src/mainboard/system76/adl/variants
parent4814492e3ca49c0303b900ce1aa00a5b8e08f381 (diff)
mb/system76/adl: darp8,lemp11: Disable RTD3 on SATA port
After switching to S3, it was found that drives on the SATA port do not exit D3cold on S3 exit. Disable RTD3 on the port until the issue can be resolved. Avoids the following error in Linux: pcieport 0000:00:1d.0: Unable to change power state from D3cold to D0, device inaccessible Tested on darp8 with a Samsung 970 EVO or Crucial P5 in J_SSD1. Change-Id: Ib26f59db61acfbf9248cea379c197765d3d9c470 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76593 Reviewed-by: Jeremy Soller <jeremy@system76.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/system76/adl/variants')
-rw-r--r--src/mainboard/system76/adl/variants/darp8/overridetree.cb13
-rw-r--r--src/mainboard/system76/adl/variants/lemp11/overridetree.cb13
2 files changed, 14 insertions, 12 deletions
diff --git a/src/mainboard/system76/adl/variants/darp8/overridetree.cb b/src/mainboard/system76/adl/variants/darp8/overridetree.cb
index 91b029111a..1feac2b916 100644
--- a/src/mainboard/system76/adl/variants/darp8/overridetree.cb
+++ b/src/mainboard/system76/adl/variants/darp8/overridetree.cb
@@ -151,12 +151,13 @@ chip soc/intel/alderlake
.clk_req = 4,
.flags = PCIE_RP_LTR,
}"
- chip soc/intel/common/block/pcie/rtd3
- register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" # SSD1_PWR_EN
- register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B16)" # M2_SSD1_RST#
- register "srcclk_pin" = "4" # SSD1_CLKREQ#
- device generic 0 on end
- end
+ # FIXME: Drives do not exit D3cold on S3 exit
+ #chip soc/intel/common/block/pcie/rtd3
+ # register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" # SSD1_PWR_EN
+ # register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B16)" # M2_SSD1_RST#
+ # register "srcclk_pin" = "4" # SSD1_CLKREQ#
+ # device generic 0 on end
+ #end
end
device ref pmc hidden
chip drivers/intel/pmc_mux
diff --git a/src/mainboard/system76/adl/variants/lemp11/overridetree.cb b/src/mainboard/system76/adl/variants/lemp11/overridetree.cb
index 379dad8bb3..34e8041269 100644
--- a/src/mainboard/system76/adl/variants/lemp11/overridetree.cb
+++ b/src/mainboard/system76/adl/variants/lemp11/overridetree.cb
@@ -137,12 +137,13 @@ chip soc/intel/alderlake
.clk_req = 1,
.flags = PCIE_RP_LTR,
}"
- chip soc/intel/common/block/pcie/rtd3
- register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" # SSD1_PWR_EN
- register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0)" # M2_SSD1_RST#
- register "srcclk_pin" = "1" # SSD1_CLKREQ#
- device generic 0 on end
- end
+ # FIXME: Drives do not exit D3cold on S3 exit
+ #chip soc/intel/common/block/pcie/rtd3
+ # register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" # SSD1_PWR_EN
+ # register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0)" # M2_SSD1_RST#
+ # register "srcclk_pin" = "1" # SSD1_CLKREQ#
+ # device generic 0 on end
+ #end
end
device ref pmc hidden
chip drivers/intel/pmc_mux