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authorUwe Hermann <uwe@hermann-uwe.de>2007-11-07 00:19:42 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-11-07 00:19:42 +0000
commitb294582a0fb988767b02fc00087429e3b51b8de0 (patch)
treeba23cf5e82158746de79770059b60bf455e2a295 /src/mainboard/supermicro
parentc931625babcfacda301598f4eb0cea37d6e0e08c (diff)
Add PCI IDs for most Intel southbridges of the 82801 series
(ICH/ICH0 up to the ICH9 family) in preparation for further code improvements for the i82801xx southbridge code. Small fixes in the 6300ESB PCI IDs. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2947 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro')
-rw-r--r--src/mainboard/supermicro/x6dai_g/reset.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/supermicro/x6dai_g/reset.c b/src/mainboard/supermicro/x6dai_g/reset.c
index 1d7f5a3301..dd9b603279 100644
--- a/src/mainboard/supermicro/x6dai_g/reset.c
+++ b/src/mainboard/supermicro/x6dai_g/reset.c
@@ -26,7 +26,7 @@ void full_reset(void)
{
device_t dev;
/* Enable power on after power fail... */
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_6300ESB_ISA), 0);
+ dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_6300ESB_LPC), 0);
if (dev != PCI_DEV_INVALID) {
unsigned byte;
byte = pci_read_config8(dev, 0xa4);