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authorStefan Reinauer <stepan@openbios.org>2006-04-06 21:37:10 +0000
committerStefan Reinauer <stepan@openbios.org>2006-04-06 21:37:10 +0000
commit966d0e6d70b20b6d14e265d59aaad37ce84d2ddb (patch)
tree70a4ea1fb8f3de6912dd6e2064f832bd5a393bbc /src/mainboard/supermicro
parent44f72eb3a3d07ec3c775b748f6a2a16e9e0a3e75 (diff)
break the tree really quick due to svn restrictions, next commit fill fix it
again. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro')
-rw-r--r--src/mainboard/supermicro/x6dhe_g2/Config.lb2
-rw-r--r--src/mainboard/supermicro/x6dhe_g2/auto.c2
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/Config.lb2
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/auto.c2
-rw-r--r--src/mainboard/supermicro/x6dhr_ig2/Config.lb2
-rw-r--r--src/mainboard/supermicro/x6dhr_ig2/auto.c2
6 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/supermicro/x6dhe_g2/Config.lb b/src/mainboard/supermicro/x6dhe_g2/Config.lb
index 65a990017f..dd58bb18ee 100644
--- a/src/mainboard/supermicro/x6dhe_g2/Config.lb
+++ b/src/mainboard/supermicro/x6dhe_g2/Config.lb
@@ -140,7 +140,7 @@ chip northbridge/intel/E7520 # MCH
device pnp 00.3 off end
end
device pci_domain 0 on
- chip southbridge/intel/ich5r # ICH5R
+ chip southbridge/intel/i82801er # ICH5R
register "pirq_a_d" = "0x0b070a05"
register "pirq_e_h" = "0x0a808080"
diff --git a/src/mainboard/supermicro/x6dhe_g2/auto.c b/src/mainboard/supermicro/x6dhe_g2/auto.c
index 978356c0ee..735ad43c27 100644
--- a/src/mainboard/supermicro/x6dhe_g2/auto.c
+++ b/src/mainboard/supermicro/x6dhe_g2/auto.c
@@ -10,7 +10,7 @@
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
-#include "southbridge/intel/ich5r/ich5r_early_smbus.c"
+#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/E7520/raminit.h"
#include "superio/NSC/pc87427/pc87427.h"
#include "cpu/x86/lapic/boot_cpu.c"
diff --git a/src/mainboard/supermicro/x6dhr_ig/Config.lb b/src/mainboard/supermicro/x6dhr_ig/Config.lb
index e6cdc0c5f9..2fb4ac6602 100644
--- a/src/mainboard/supermicro/x6dhr_ig/Config.lb
+++ b/src/mainboard/supermicro/x6dhr_ig/Config.lb
@@ -134,7 +134,7 @@ config chip.h
chip northbridge/intel/E7520 # mch
device pci_domain 0 on
- chip southbridge/intel/ich5r # ich5r
+ chip southbridge/intel/i82801er # i82801er
# USB ports
device pci 1d.0 on end
device pci 1d.1 on end
diff --git a/src/mainboard/supermicro/x6dhr_ig/auto.c b/src/mainboard/supermicro/x6dhr_ig/auto.c
index ce729546e6..6df3e66da0 100644
--- a/src/mainboard/supermicro/x6dhr_ig/auto.c
+++ b/src/mainboard/supermicro/x6dhr_ig/auto.c
@@ -10,7 +10,7 @@
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
-#include "southbridge/intel/ich5r/ich5r_early_smbus.c"
+#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/E7520/raminit.h"
#include "superio/winbond/w83627hf/w83627hf.h"
#include "cpu/x86/lapic/boot_cpu.c"
diff --git a/src/mainboard/supermicro/x6dhr_ig2/Config.lb b/src/mainboard/supermicro/x6dhr_ig2/Config.lb
index dff583ce2c..bfc9c2180c 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/Config.lb
+++ b/src/mainboard/supermicro/x6dhr_ig2/Config.lb
@@ -134,7 +134,7 @@ config chip.h
chip northbridge/intel/E7520 # mch
device pci_domain 0 on
- chip southbridge/intel/ich5r # ich5r
+ chip southbridge/intel/i82801er # i82801er
# USB ports
device pci 1d.0 on end
device pci 1d.1 on end
diff --git a/src/mainboard/supermicro/x6dhr_ig2/auto.c b/src/mainboard/supermicro/x6dhr_ig2/auto.c
index cd7c18111f..1998d34ab6 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/auto.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/auto.c
@@ -10,7 +10,7 @@
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
-#include "southbridge/intel/ich5r/ich5r_early_smbus.c"
+#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/E7520/raminit.h"
#include "superio/winbond/w83627hf/w83627hf.h"
#include "cpu/x86/lapic/boot_cpu.c"