diff options
| author | Felix Singer <felixsinger@posteo.net> | 2024-06-23 00:25:18 +0200 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2024-06-26 11:43:56 +0000 |
| commit | 6c83a71b0a803c922b02b613e927d4c49b944c32 (patch) | |
| tree | 176f163e7fdeaaf1032c853e87ce5571bd921be7 /src/mainboard/supermicro | |
| parent | c7c8cf2edd713fd578423bc043403ae4f91e2e29 (diff) | |
skl mainboards/dt: Move usb{2,3}_ports settings into XHCI device scope
Change-Id: I22ba991a9d559b0ecc7b3ceddcfd099890dd6c3a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
Diffstat (limited to 'src/mainboard/supermicro')
4 files changed, 103 insertions, 99 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb index 98bfb04fb3..4063bedde3 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb @@ -15,32 +15,33 @@ chip soc/intel/skylake # This board has an IGD with no output. register "PrimaryDisplay" = "Display_Auto" - register "usb2_ports" = "{ - [0] = USB2_PORT_MID(OC0), /* USB 2 */ - [1] = USB2_PORT_MID(OC0), /* USB 3 */ - [2] = USB2_PORT_MID(OC1), /* USB 4 */ - [3] = USB2_PORT_MID(OC1), /* USB 5 */ - [4] = USB2_PORT_MID(OC2), /* USB 0 */ - [5] = USB2_PORT_MID(OC2), /* USB 1 */ - [8] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */ - [9] = USB2_PORT_MID(OC5), /* USB 8 (3.0) */ - [10] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */ - [11] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */ - [12] = USB2_PORT_MID(OC3), /* USB 10 (3.0) */ - [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */ - [14] = USB2_PORT_MID(OC0), /* Unknown */ - [15] = USB2_PORT_MID(OC0), /* Unknown */ - }" - - register "usb3_ports" = "{ - [0] = USB3_PORT_DEFAULT(OC5), /* USB 8 */ - [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */ - [2] = USB3_PORT_DEFAULT(OC4), /* USB 7 */ - [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */ - [4] = USB3_PORT_DEFAULT(OC3), /* USB 10 */ - }" - device domain 0 on + device ref south_xhci on + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC0), /* USB 2 */ + [1] = USB2_PORT_MID(OC0), /* USB 3 */ + [2] = USB2_PORT_MID(OC1), /* USB 4 */ + [3] = USB2_PORT_MID(OC1), /* USB 5 */ + [4] = USB2_PORT_MID(OC2), /* USB 0 */ + [5] = USB2_PORT_MID(OC2), /* USB 1 */ + [8] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */ + [9] = USB2_PORT_MID(OC5), /* USB 8 (3.0) */ + [10] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */ + [11] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */ + [12] = USB2_PORT_MID(OC3), /* USB 10 (3.0) */ + [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */ + [14] = USB2_PORT_MID(OC0), /* Unknown */ + [15] = USB2_PORT_MID(OC0), /* Unknown */ + }" + + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC5), /* USB 8 */ + [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */ + [2] = USB3_PORT_DEFAULT(OC4), /* USB 7 */ + [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */ + [4] = USB3_PORT_DEFAULT(OC3), /* USB 10 */ + }" + end device ref peg0 on # Slot JPCIE3 smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthShort" "CPU SLOT6 PCI-E 3.0 X8(IN X16)" "SlotDataBusWidth8X" diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb index b46b2205b8..035811f9bf 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb @@ -14,32 +14,33 @@ chip soc/intel/skylake # FIXME: find out why FSP crashes without this register "PchHdaVcType" = "Vc1" - register "usb2_ports" = "{ - [0] = USB2_PORT_MID(OC0), /* USB 2 */ - [1] = USB2_PORT_MID(OC0), /* USB 3 */ - [2] = USB2_PORT_MID(OC1), /* USB 4 */ - [3] = USB2_PORT_MID(OC1), /* USB 5 */ - [4] = USB2_PORT_MID(OC2), /* USB 0 */ - [5] = USB2_PORT_MID(OC2), /* USB 1 */ - [8] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */ - [9] = USB2_PORT_MID(OC5), /* USB 8 (3.0) */ - [10] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */ - [11] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */ - [12] = USB2_PORT_MID(OC3), /* USB 10 (3.0) */ - [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */ - [14] = USB2_PORT_MID(OC0), /* Unknown */ - [15] = USB2_PORT_MID(OC0), /* Unknown */ - }" - - register "usb3_ports" = "{ - [0] = USB3_PORT_DEFAULT(OC5), /* USB 8 */ - [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */ - [2] = USB3_PORT_DEFAULT(OC4), /* USB 7 */ - [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */ - [4] = USB3_PORT_DEFAULT(OC3), /* USB 10 */ - }" - device domain 0 on + device ref south_xhci on + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC0), /* USB 2 */ + [1] = USB2_PORT_MID(OC0), /* USB 3 */ + [2] = USB2_PORT_MID(OC1), /* USB 4 */ + [3] = USB2_PORT_MID(OC1), /* USB 5 */ + [4] = USB2_PORT_MID(OC2), /* USB 0 */ + [5] = USB2_PORT_MID(OC2), /* USB 1 */ + [8] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */ + [9] = USB2_PORT_MID(OC5), /* USB 8 (3.0) */ + [10] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */ + [11] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */ + [12] = USB2_PORT_MID(OC3), /* USB 10 (3.0) */ + [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */ + [14] = USB2_PORT_MID(OC0), /* Unknown */ + [15] = USB2_PORT_MID(OC0), /* Unknown */ + }" + + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC5), /* USB 8 */ + [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */ + [2] = USB3_PORT_DEFAULT(OC4), /* USB 7 */ + [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */ + [4] = USB3_PORT_DEFAULT(OC3), /* USB 10 */ + }" + end device ref peg0 on end # unused device ref peg1 on # Slot JPCIE1 diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb index 29252fec99..1b553d12e3 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/overridetree.cb @@ -11,31 +11,32 @@ chip soc/intel/skylake register "gen1_dec" = "0x007c0a01" # Super IO SWC register "gen2_dec" = "0x000c0ca1" # IPMI KCS - register "usb2_ports" = "{ - [0] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */ - [1] = USB2_PORT_MID(OC3), /* USB 8 (3.0) */ - [2] = USB2_PORT_MID(OC1), /* USB 3 */ - [3] = USB2_PORT_MID(OC1), /* USB 2 */ - [4] = USB2_PORT_MID(OC2), /* USB 1 */ - [5] = USB2_PORT_MID(OC2), /* USB 0 */ - [6] = USB2_PORT_MID(OC0), /* USB 5 */ - [7] = USB2_PORT_MID(OC0), /* USB 4 */ - [8] = USB2_PORT_MID(OC_SKIP), /* IPMI USB HUB */ - [9] = USB2_PORT_MID(OC5), /* USB 10 (3.0) */ - [10] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */ - [11] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */ - }" - - register "usb3_ports" = "{ - [0] = USB3_PORT_DEFAULT(OC4), /* USB 7 */ - [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */ - [2] = USB3_PORT_DEFAULT(OC5), /* USB 10 */ - [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */ - [4] = USB3_PORT_DEFAULT(OC3), /* USB 8 */ - }" - device domain 0 on subsystemid 0x15d9 0x0896 inherit + device ref south_xhci on + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC3), /* USB 9 (3.0) */ + [1] = USB2_PORT_MID(OC3), /* USB 8 (3.0) */ + [2] = USB2_PORT_MID(OC1), /* USB 3 */ + [3] = USB2_PORT_MID(OC1), /* USB 2 */ + [4] = USB2_PORT_MID(OC2), /* USB 1 */ + [5] = USB2_PORT_MID(OC2), /* USB 0 */ + [6] = USB2_PORT_MID(OC0), /* USB 5 */ + [7] = USB2_PORT_MID(OC0), /* USB 4 */ + [8] = USB2_PORT_MID(OC_SKIP), /* IPMI USB HUB */ + [9] = USB2_PORT_MID(OC5), /* USB 10 (3.0) */ + [10] = USB2_PORT_MID(OC4), /* USB 7 (3.0) */ + [11] = USB2_PORT_MID(OC4), /* USB 6 (3.0) */ + }" + + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC4), /* USB 7 */ + [1] = USB3_PORT_DEFAULT(OC4), /* USB 6 */ + [2] = USB3_PORT_DEFAULT(OC5), /* USB 10 */ + [3] = USB3_PORT_DEFAULT(OC3), /* USB 9 */ + [4] = USB3_PORT_DEFAULT(OC3), /* USB 8 */ + }" + end device ref peg0 on # Slot JPCIE6 smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthLong" "CPU SLOT6 PCI-E 3.0 X8(IN X16)" "SlotDataBusWidth8X" diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssw-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssw-f/overridetree.cb index 29babda0dc..17ba31bd58 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssw-f/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssw-f/overridetree.cb @@ -15,33 +15,34 @@ chip soc/intel/skylake # This board has an IGD with no output. register "PrimaryDisplay" = "Display_Auto" - # NB: Overcurrent OCx values untested - register "usb2_ports" = "{ - [0] = USB2_PORT_MID(OC3), /* USB 6 (3.0) */ - [1] = USB2_PORT_MID(OC3), /* USB 7 (3.0) */ - [2] = USB2_PORT_MID(OC2), /* USB 0 */ - [3] = USB2_PORT_MID(OC2), /* USB 1 */ - [4] = USB2_PORT_MID(OC1), /* USB 4 */ - [5] = USB2_PORT_MID(OC1), /* USB 5 */ - [8] = USB2_PORT_MID(OC0), /* USB 2 */ - [9] = USB2_PORT_MID(OC0), /* USB 3 */ - [10] = USB2_PORT_MID(OC5), /* USB 9 (3.0) */ - [11] = USB2_PORT_MID(OC5), /* USB 10 (3.0) */ - [12] = USB2_PORT_MID(OC4), /* USB 8 (3.0) */ - [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */ - [14] = USB2_PORT_MID(OC0), /* Unknown */ - [15] = USB2_PORT_MID(OC0), /* Unknown */ - }" - - register "usb3_ports" = "{ - [0] = USB3_PORT_DEFAULT(OC3), /* USB 6 */ - [1] = USB3_PORT_DEFAULT(OC3), /* USB 7 */ - [2] = USB3_PORT_DEFAULT(OC4), /* USB 8 */ - [3] = USB3_PORT_DEFAULT(OC5), /* USB 9 */ - [4] = USB3_PORT_DEFAULT(OC5), /* USB 10 */ - }" - device domain 0 on + device ref south_xhci on + # NB: Overcurrent OCx values untested + register "usb2_ports" = "{ + [0] = USB2_PORT_MID(OC3), /* USB 6 (3.0) */ + [1] = USB2_PORT_MID(OC3), /* USB 7 (3.0) */ + [2] = USB2_PORT_MID(OC2), /* USB 0 */ + [3] = USB2_PORT_MID(OC2), /* USB 1 */ + [4] = USB2_PORT_MID(OC1), /* USB 4 */ + [5] = USB2_PORT_MID(OC1), /* USB 5 */ + [8] = USB2_PORT_MID(OC0), /* USB 2 */ + [9] = USB2_PORT_MID(OC0), /* USB 3 */ + [10] = USB2_PORT_MID(OC5), /* USB 9 (3.0) */ + [11] = USB2_PORT_MID(OC5), /* USB 10 (3.0) */ + [12] = USB2_PORT_MID(OC4), /* USB 8 (3.0) */ + [13] = USB2_PORT_MID(OC_SKIP), /* IPMI USB hub */ + [14] = USB2_PORT_MID(OC0), /* Unknown */ + [15] = USB2_PORT_MID(OC0), /* Unknown */ + }" + + register "usb3_ports" = "{ + [0] = USB3_PORT_DEFAULT(OC3), /* USB 6 */ + [1] = USB3_PORT_DEFAULT(OC3), /* USB 7 */ + [2] = USB3_PORT_DEFAULT(OC4), /* USB 8 */ + [3] = USB3_PORT_DEFAULT(OC5), /* USB 9 */ + [4] = USB3_PORT_DEFAULT(OC5), /* USB 10 */ + }" + end device ref peg0 on # Slot JSXB1B smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthLong" "CPU SLOT1 PCI-E 3.0 X16" "SlotDataBusWidth16X" |