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authorFelix Singer <felixsinger@posteo.net>2024-06-23 20:32:15 +0200
committerFelix Singer <felixsinger@posteo.net>2024-06-26 11:44:13 +0000
commit4b7220398923af42fa39a7fcb532daf797510f77 (patch)
treef338082fc94ba81015f56348d48fe159fc238201 /src/mainboard/supermicro
parentdf7de392ef5f8e1654df96a1a050820eb3779012 (diff)
skl mainboards/dt: Move serirq setting into LPC device scope
Change-Id: I84da5365907664ce223dec4adb22a8f1a6e2a144 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83188 Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm> Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/supermicro')
-rw-r--r--src/mainboard/supermicro/x11-lga1151-series/devicetree.cb5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
index 29759fd9fc..fbf896c6ae 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
@@ -4,9 +4,6 @@ chip soc/intel/skylake
register "SkipExtGfxScan" = "1"
- # LPC
- register "serirq_mode" = "SERIRQ_CONTINUOUS"
-
# Enabling SLP_S0, SLP_S3#, SLP_S4#, SLP_SUS and SLP_A Stretch
register "s0ix_enable" = true
register "PmConfigSlpS3MinAssert" = "SLP_S3_MIN_ASSERT_50MS"
@@ -33,6 +30,8 @@ chip soc/intel/skylake
}"
end
device ref lpc_espi on
+ register "serirq_mode" = "SERIRQ_CONTINUOUS"
+
chip superio/common
device pnp 2e.0 on end
end