Drop Kconfig variable BOARD_HAS_HARD_RESET

hard_reset was indeed consolidated and moved into the southbridge
code a while ago, but the config variable was still kept alife, with
some duplicate code.

Change-Id: I60d4a87de916667f6e89353dfbe1a7b9eca380f7
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1837
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

15 files changed, 5 insertions, 74 deletions

diff --git a/src/mainboard/supermicro/x6dai_g/Kconfig b/src/mainboard/supermicro/x6dai_g/Kconfig
index bac1008a1a..90a800cee0 100644
--- a/src/mainboard/supermicro/x6dai_g/Kconfig
+++ b/src/mainboard/supermicro/x6dai_g/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SUPERIO_WINBOND_W83627HF
 	select ROMCC
 	select HAVE_HARD_RESET
-	select BOARD_HAS_HARD_RESET
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
diff --git a/src/mainboard/supermicro/x6dai_g/reset.c b/src/mainboard/supermicro/x6dai_g/reset.c
deleted file mode 100644
index 2f21605e7c..0000000000
--- a/src/mainboard/supermicro/x6dai_g/reset.c
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <arch/io.h>
-#include <reset.h>
-
-void soft_reset(void)
-{
-        outb(0x04, 0xcf9);
-}
-void hard_reset(void)
-{
-        outb(0x02, 0xcf9);
-        outb(0x06, 0xcf9);
-}
diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c
index 479e24c5ae..dda5817335 100644
--- a/src/mainboard/supermicro/x6dai_g/romstage.c
+++ b/src/mainboard/supermicro/x6dai_g/romstage.c
@@ -15,7 +15,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "debug.c"
 #include "watchdog.c"
-#include "reset.c"
+#include "southbridge/intel/esb6300/reset.c"
 #include "superio/winbond/w83627hf/early_serial.c"
 #include "northbridge/intel/e7525/memory_initialized.c"
 #include "cpu/x86/bist.h"
diff --git a/src/mainboard/supermicro/x6dhe_g/Kconfig b/src/mainboard/supermicro/x6dhe_g/Kconfig
index e8466be8a3..03bb0a8508 100644
--- a/src/mainboard/supermicro/x6dhe_g/Kconfig
+++ b/src/mainboard/supermicro/x6dhe_g/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SUPERIO_WINBOND_W83627HF
 	select ROMCC
 	select HAVE_HARD_RESET
-	select BOARD_HAS_HARD_RESET
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
diff --git a/src/mainboard/supermicro/x6dhe_g/reset.c b/src/mainboard/supermicro/x6dhe_g/reset.c
deleted file mode 100644
index 1b1bc68d4b..0000000000
--- a/src/mainboard/supermicro/x6dhe_g/reset.c
+++ /dev/null
@@ -1,13 +0,0 @@
-#include <arch/io.h>
-#include <reset.h>
-
-void soft_reset(void)
-{
-        outb(0x04, 0xcf9);
-}
-
-void hard_reset(void)
-{
-        outb(0x02, 0xcf9);
-        outb(0x06, 0xcf9);
-}
diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
index f2578e5264..37fd2e43d7 100644
--- a/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g/romstage.c
@@ -15,7 +15,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "debug.c"
 #include "watchdog.c"
-#include "reset.c"
+#include "southbridge/intel/esb6300/reset.c"
 #include "superio/winbond/w83627hf/early_serial.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
diff --git a/src/mainboard/supermicro/x6dhe_g2/Kconfig b/src/mainboard/supermicro/x6dhe_g2/Kconfig
index 0f03336d83..397087cc36 100644
--- a/src/mainboard/supermicro/x6dhe_g2/Kconfig
+++ b/src/mainboard/supermicro/x6dhe_g2/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_PXHD
 	select SUPERIO_NSC_PC87427
 	select ROMCC
-	select BOARD_HAS_HARD_RESET
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
diff --git a/src/mainboard/supermicro/x6dhe_g2/reset.c b/src/mainboard/supermicro/x6dhe_g2/reset.c
deleted file mode 100644
index 1b1bc68d4b..0000000000
--- a/src/mainboard/supermicro/x6dhe_g2/reset.c
+++ /dev/null
@@ -1,13 +0,0 @@
-#include <arch/io.h>
-#include <reset.h>
-
-void soft_reset(void)
-{
-        outb(0x04, 0xcf9);
-}
-
-void hard_reset(void)
-{
-        outb(0x02, 0xcf9);
-        outb(0x06, 0xcf9);
-}
diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
index d86d83d36a..c9db699a72 100644
--- a/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -13,7 +13,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "debug.c"
 #include "watchdog.c"
-#include "reset.c"
+#include "southbridge/intel/i82801ex/reset.c"
 #include "superio/nsc/pc87427/early_init.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
diff --git a/src/mainboard/supermicro/x6dhr_ig/Kconfig b/src/mainboard/supermicro/x6dhr_ig/Kconfig
index db9fd957b6..0b25fcdb94 100644
--- a/src/mainboard/supermicro/x6dhr_ig/Kconfig
+++ b/src/mainboard/supermicro/x6dhr_ig/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_PXHD
 	select SUPERIO_WINBOND_W83627HF
 	select ROMCC
-	select BOARD_HAS_HARD_RESET
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
diff --git a/src/mainboard/supermicro/x6dhr_ig/reset.c b/src/mainboard/supermicro/x6dhr_ig/reset.c
deleted file mode 100644
index 1b1bc68d4b..0000000000
--- a/src/mainboard/supermicro/x6dhr_ig/reset.c
+++ /dev/null
@@ -1,13 +0,0 @@
-#include <arch/io.h>
-#include <reset.h>
-
-void soft_reset(void)
-{
-        outb(0x04, 0xcf9);
-}
-
-void hard_reset(void)
-{
-        outb(0x02, 0xcf9);
-        outb(0x06, 0xcf9);
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index e77fe7bad5..55e1ee7c2d 100644
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -13,7 +13,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "debug.c"
 #include "watchdog.c"
-#include "reset.c"
+#include "southbridge/intel/i82801ex/reset.c"
 #include "superio/winbond/w83627hf/early_serial.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"
diff --git a/src/mainboard/supermicro/x6dhr_ig2/Kconfig b/src/mainboard/supermicro/x6dhr_ig2/Kconfig
index 395c18405d..70df01ae34 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/Kconfig
+++ b/src/mainboard/supermicro/x6dhr_ig2/Kconfig
@@ -9,7 +9,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select SOUTHBRIDGE_INTEL_PXHD
 	select SUPERIO_WINBOND_W83627HF
 	select ROMCC
-	select BOARD_HAS_HARD_RESET
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
diff --git a/src/mainboard/supermicro/x6dhr_ig2/reset.c b/src/mainboard/supermicro/x6dhr_ig2/reset.c
deleted file mode 100644
index 1b1bc68d4b..0000000000
--- a/src/mainboard/supermicro/x6dhr_ig2/reset.c
+++ /dev/null
@@ -1,13 +0,0 @@
-#include <arch/io.h>
-#include <reset.h>
-
-void soft_reset(void)
-{
-        outb(0x04, 0xcf9);
-}
-
-void hard_reset(void)
-{
-        outb(0x02, 0xcf9);
-        outb(0x06, 0xcf9);
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index 91e96a061b..65bfdb2d5e 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -13,7 +13,7 @@
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "debug.c"
 #include "watchdog.c"
-#include "reset.c"
+#include "southbridge/intel/i82801ex/reset.c"
 #include "superio/winbond/w83627hf/early_serial.c"
 #include "northbridge/intel/e7520/memory_initialized.c"
 #include "cpu/x86/bist.h"