Rework boolean expression (DeMorgan and all) for

better readability.
Also remove failover.c files in mainboards, as they're
not used anymore (and useless, too)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

9 files changed, 4 insertions, 94 deletions

diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c
index 6b42690c3b..ac441a6ec8 100644
--- a/src/mainboard/supermicro/h8dme/romstage.c
+++ b/src/mainboard/supermicro/h8dme/romstage.c
@@ -252,7 +252,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	int needs_reset = 0;
 	unsigned bsp_apicid = 0;
 
-	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+	if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 
diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c
index 34c413f2f0..5b74c60590 100644
--- a/src/mainboard/supermicro/h8dmr/romstage.c
+++ b/src/mainboard/supermicro/h8dmr/romstage.c
@@ -185,7 +185,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
         int needs_reset = 0;
         unsigned bsp_apicid = 0;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 0aa934b3ca..b09ae781f6 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -177,7 +177,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 wants_reset;
 	msr_t msr;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index 9b5809dc49..1128b1130d 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -220,7 +220,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 wants_reset;
 	msr_t msr;
 
-        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+        if (!cpu_init_detectedx && boot_cpu()) {
 		/* Nothing special needs to be done to find bus 0 */
 		/* Allow the HT devices to be found */
 
diff --git a/src/mainboard/supermicro/x6dai_g/failover.c b/src/mainboard/supermicro/x6dai_g/failover.c
deleted file mode 100644
index c50fbcabcb..0000000000
--- a/src/mainboard/supermicro/x6dai_g/failover.c
+++ /dev/null
@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7525/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}
diff --git a/src/mainboard/supermicro/x6dhe_g/failover.c b/src/mainboard/supermicro/x6dhe_g/failover.c
deleted file mode 100644
index f561611a89..0000000000
--- a/src/mainboard/supermicro/x6dhe_g/failover.c
+++ /dev/null
@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}
diff --git a/src/mainboard/supermicro/x6dhe_g2/failover.c b/src/mainboard/supermicro/x6dhe_g2/failover.c
deleted file mode 100644
index f561611a89..0000000000
--- a/src/mainboard/supermicro/x6dhe_g2/failover.c
+++ /dev/null
@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig/failover.c b/src/mainboard/supermicro/x6dhr_ig/failover.c
deleted file mode 100644
index f561611a89..0000000000
--- a/src/mainboard/supermicro/x6dhr_ig/failover.c
+++ /dev/null
@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig2/failover.c b/src/mainboard/supermicro/x6dhr_ig2/failover.c
deleted file mode 100644
index f561611a89..0000000000
--- a/src/mainboard/supermicro/x6dhr_ig2/failover.c
+++ /dev/null
@@ -1,18 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <arch/romcc_io.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "pc80/mc146818rtc_early.c"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-
-static unsigned long main(unsigned long bist)
-{
-	return bist;
-}