diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2006-10-24 23:00:42 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2006-10-24 23:00:42 +0000 |
| commit | d86417bfa379de85ba7a52ba626bbdfbed389438 (patch) | |
| tree | 81ba50b7be89a1349a721d69ec13a8bc579aa30b /src/mainboard/supermicro/x6dhe_g2 | |
| parent | f327e655ce3bb6f9569b57d7a5ab28a9eab18ca2 (diff) | |
Change all occurences of NSC to nsc in the code. The next commit
will then rename the src/superio/NSC directory to src/superio/nsc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2472 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/x6dhe_g2')
| -rw-r--r-- | src/mainboard/supermicro/x6dhe_g2/Config.lb | 2 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x6dhe_g2/auto.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/supermicro/x6dhe_g2/Config.lb b/src/mainboard/supermicro/x6dhe_g2/Config.lb index dd58bb18ee..92567883d2 100644 --- a/src/mainboard/supermicro/x6dhe_g2/Config.lb +++ b/src/mainboard/supermicro/x6dhe_g2/Config.lb @@ -167,7 +167,7 @@ chip northbridge/intel/E7520 # MCH device pci 1f.0 on # ISA bridge - chip superio/NSC/pc87427 + chip superio/nsc/pc87427 device pnp 2e.0 off end device pnp 2e.2 on io 0x60 = 0x3f8 diff --git a/src/mainboard/supermicro/x6dhe_g2/auto.c b/src/mainboard/supermicro/x6dhe_g2/auto.c index 735ad43c27..854a74a132 100644 --- a/src/mainboard/supermicro/x6dhe_g2/auto.c +++ b/src/mainboard/supermicro/x6dhe_g2/auto.c @@ -12,14 +12,14 @@ #include "ram/ramtest.c" #include "southbridge/intel/i82801er/i82801er_early_smbus.c" #include "northbridge/intel/E7520/raminit.h" -#include "superio/NSC/pc87427/pc87427.h" +#include "superio/nsc/pc87427/pc87427.h" #include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/mtrr/earlymtrr.c" #include "debug.c" #include "watchdog.c" #include "reset.c" #include "x6dhe_g2_fixups.c" -#include "superio/NSC/pc87427/pc87427_early_init.c" +#include "superio/nsc/pc87427/pc87427_early_init.c" #include "northbridge/intel/E7520/memory_initialized.c" #include "cpu/x86/bist.h" |