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| author | Michael Niewöhner <foss@mniewoehner.de> | 2019-09-23 14:38:41 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-02 11:15:00 +0000 |
| commit | 6238563b2b65edac8e6dba4f8f20eb020c172317 (patch) | |
| tree | 8293ac5ef0441b978b3c447a19f8262627d25843 /src/mainboard/supermicro/x11-lga1151-series/variants | |
| parent | 5387144a939b4ad3d334f2b4abebb987611b0274 (diff) | |
soc/intel/skylake: devicetree: introduce PchHdaVcType fsp parameter
Make the the FSP Parameter PchHdaVcType a devicetree setting and make
use of it in the devicetrees of all boards that currently set it.
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Change-Id: Ibafc3b6bd2495658f2bd634218042ec413a89f5e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35542
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Diffstat (limited to 'src/mainboard/supermicro/x11-lga1151-series/variants')
| -rw-r--r-- | src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb index 1039f7a0ca..09aa8b558c 100644 --- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb +++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-tf/overridetree.cb @@ -30,6 +30,9 @@ chip soc/intel/skylake register "PcieRpEnable[8]" = "1" register "PcieRpClkReqSupport[8]" = "0" + # FIXME: find out why FSP crashes without this + register "PchHdaVcType" = "Vc1" + device domain 0 on device pci 01.0 on end # unused device pci 01.1 on # PCIE Slot (JPCIE1) |