mb/supermicro/x11: Make use of chipset devicetree

Use the references from the chipset devicetree as this makes the
comments superfluous and remove devices which are turned off.

Change-Id: I5176aa56ecaa52d0f42455bc7176b0415a6199ec
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78594
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 8 insertions, 57 deletions

diff --git a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
index d98c20ed57..254486cf6e 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/devicetree.cb
@@ -28,56 +28,12 @@ chip soc/intel/skylake
 
 	device cpu_cluster 0 on end
 	device domain 0 on
-		device pci 00.0 on  end	# Host Bridge
-		device pci 01.0 off end	# CPU PCIe Port 10 (x16)
-		device pci 01.1 off end	# CPU PCIe Port 11 (x8)
-		device pci 01.2 off end	# CPU PCIe Port 12 (x4)
-		device pci 02.0 off end	# Integrated Graphics Device (IGD)
-		device pci 04.0 on  end	# SA thermal subsystem
-		device pci 05.0 off end	# Imaging Unit
-		device pci 08.0 off end	# Gaussion Mixture Model (GMM)
-		device pci 13.0 off end	# Integrated Sensor Hub
-		device pci 14.0 on  end	# USB xHCI
-		device pci 14.1 off end	# USB xDCI (OTG)
-		device pci 14.2 on  end	# Thermal Subsystem
-		device pci 15.0 off end	# I2C #0
-		device pci 15.1 off end	# I2C #1
-		device pci 15.2 off end	# I2C #2
-		device pci 15.3 off end	# I2C #3
-		device pci 16.0 on  end	# Management Engine Interface 1
-		device pci 16.1 off end	# Management Engine Interface 2
-		device pci 16.2 off end	# Management Engine IDE-R
-		device pci 16.3 off end	# Management Engine KT Redirection
-		device pci 16.4 off end	# Management Engine Interface 3
-		device pci 17.0 on  end	# SATA
-		device pci 19.0 off end	# UART #2
-		device pci 19.1 off end	# I2C #5
-		device pci 19.2 off end	# I2C #4
-		device pci 1b.0 off end	# PCH PCIe Port 17
-		device pci 1b.1 off end	# PCH PCIe Port 18
-		device pci 1b.2 off end	# PCH PCIe Port 19
-		device pci 1b.3 off end	# PCH PCIe Port 20
-		device pci 1c.0 off end	# PCH PCIe Port  1
-		device pci 1c.1 off end	# PCH PCIe Port  2
-		device pci 1c.2 off end	# PCH PCIe Port  3
-		device pci 1c.3 off end	# PCH PCIe Port  4
-		device pci 1c.4 off end	# PCH PCIe Port  5
-		device pci 1c.5 off end	# PCH PCIe Port  6
-		device pci 1c.6 off end	# PCH PCIe Port  7
-		device pci 1c.7 off end	# PCH PCIe Port  8
-		device pci 1d.0 off end	# PCH PCIe Port  9
-		device pci 1d.1 off end	# PCH PCIe Port 10
-		device pci 1d.2 off end	# PCH PCIe Port 11
-		device pci 1d.3 off end	# PCH PCIe Port 12
-		device pci 1d.4 off end	# PCH PCIe Port 13
-		device pci 1d.5 off end	# PCH PCIe Port 14
-		device pci 1d.6 off end	# PCH PCIe Port 15
-		device pci 1d.7 off end	# PCH PCIe Port 16
-		device pci 1e.0 off end	# UART #0
-		device pci 1e.1 off end	# UART #1
-		device pci 1e.2 off end	# SPI #0
-		device pci 1e.6 off end # SDXC
-		device pci 1f.0 on	# LPC Interface
+		device ref sa_thermal on end
+		device ref south_xhci on end
+		device ref thermal on end
+		device ref heci1 on end
+		device ref sata on end
+		device ref lpc_espi on
 			chip superio/common
 				device pnp 2e.0 on  end
 			end
@@ -85,12 +41,7 @@ chip soc/intel/skylake
 				device pnp 0c31.0 on  end
 			end
 		end
-		device pci 1f.1 on  end	# P2SB
-		device pci 1f.2 on  end	# Power Management Controller
-		device pci 1f.3 off end	# Intel HDA
-		device pci 1f.4 on  end	# SMBus
-		device pci 1f.5 on  end	# SPI Controller
-		device pci 1f.6 off end	# GbE
-		device pci 1f.7 off end	# Intel Trace Hub
+		device ref smbus on end
+		device ref fast_spi on end
 	end
 end