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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-04-18 14:34:18 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-04-20 15:31:18 +0200 |
| commit | 318e2ac974e4f02e75fcfe9772b90de3dbe01327 (patch) | |
| tree | d9331813d71a457f99e4bae87e83cbf476b1184d /src/mainboard/supermicro/h8scm | |
| parent | 0793afe913a78990b1f4b3fff037eae5365f1078 (diff) | |
AMD CIMX: Drop unused code
We never define B1_IMAGE or B2_IMAGE. These are about building
CIMx as separate binary modules, while coreboot builds these into
same romstage or ramstage module.
Change-Id: I9cfa3f0bff8332aff4b661d56d0e7b340a992992
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/14393
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Kerry Sheh <shekairui@gmail.com>
Diffstat (limited to 'src/mainboard/supermicro/h8scm')
| -rw-r--r-- | src/mainboard/supermicro/h8scm/rd890_cfg.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/supermicro/h8scm/rd890_cfg.c b/src/mainboard/supermicro/h8scm/rd890_cfg.c index c5ae2a3ffe..9bbb02a50c 100644 --- a/src/mainboard/supermicro/h8scm/rd890_cfg.c +++ b/src/mainboard/supermicro/h8scm/rd890_cfg.c @@ -220,7 +220,6 @@ void rd890_cimx_config(AMD_NB_CONFIG_BLOCK *pConfig, NB_CONFIG *nbConfig, HT_CON AmdInitializer(pConfig); pConfig->NumberOfNorthbridges = MAX_NB_COUNT - 1; /* Support limited to primary NB only located at 0:0:0 */ - //pConfig->StandardHeader.ImageBasePtr = CIMX_B2_IMAGE_BASE_ADDRESS; pConfig->StandardHeader.PcieBasePtr = (VOID *)PCIEX_BASE_ADDRESS; pConfig->StandardHeader.CalloutPtr = &rd890_callout_entry; |