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authorGabe Black <gabeblack@google.com>2013-06-24 03:14:41 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 23:00:41 +0200
commit7c2ae7ae53ac2bc4dadc55ba5445d0556ee32251 (patch)
treea2fe4a7c3e680763b08a7ddbe071d7270f785713 /src/mainboard/supermicro/h8qgi
parent04d6e01d43626383fb80936ef1237df67cf23ca1 (diff)
exynos5420: Clock the mmc blocks off of the mpll.
The exynos manual suggests hooking the mmc ip blocks to the mpll. They had been set to use a different pll. This changes them over and modifies the divider so that the frequency stays the same. Change-Id: I85103388d6cc2c63d1ca004654fc08fcc8929962 Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3703 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/supermicro/h8qgi')
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