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authorElyes HAOUAS <ehaouas@noos.fr>2018-04-26 09:43:03 +0200
committerMartin Roth <martinroth@google.com>2018-05-08 14:18:36 +0000
commitf5f1b383b1319c515338e82857461d2ab4608c1d (patch)
tree222ce4fdca15fb2d9b26e3190e1b82d908be700f /src/mainboard/supermicro/h8dmr_fam10
parent64b759e2011e6e5a090e9442da3779c344734549 (diff)
mb/superio: Rename global control devices as SUPERIO_DEV
Use SUPERIO_DEV for global control device instead of DUMMY_DEV. Change-Id: If3555906d359695b2eae51209cd97fbaaace7e61 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25852 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/supermicro/h8dmr_fam10')
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index fa22952687..c360389e38 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -50,7 +50,7 @@
#include "southbridge/nvidia/mcp55/early_setup_car.c"
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-#define DUMMY_DEV PNP_DEV(0x2e, 0)
+#define SUPERIO_DEV PNP_DEV(0x2e, 0)
void activate_spd_rom(const struct mem_controller *ctrl);
int spd_read_byte(unsigned device, unsigned address);
@@ -130,7 +130,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x32);
- winbond_set_clksel_48(DUMMY_DEV);
+ winbond_set_clksel_48(SUPERIO_DEV);
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();