diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-25 18:06:32 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-25 18:06:32 +0000 |
| commit | bcb8c97af94c9fc814fdbdafe5361666bf81d442 (patch) | |
| tree | d3a121678b32d7436787975292432c4975bb9f6d /src/mainboard/supermicro/h8dme | |
| parent | 14b62da01ded297e12db6ed3b41778202e9aae41 (diff) | |
try to unify timing initialization across those boards that need it...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/h8dme')
| -rw-r--r-- | src/mainboard/supermicro/h8dme/romstage.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index e2e297b9ce..4055e7065d 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -46,16 +46,14 @@ #include "option_table.h" #include "pc80/mc146818rtc_early.c" -// for enable the FAN -#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" - #include "pc80/serial.c" #include "console/console.c" #include "lib/ramtest.c" #include <cpu/amd/model_fxx_rev.h> -// #include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" +// for enable the FAN +#include "southbridge/nvidia/mcp55/mcp55_early_smbus.c" #include "northbridge/amd/amdk8/raminit.h" #include "cpu/amd/model_fxx/apic_timer.c" #include "lib/delay.c" @@ -313,7 +311,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } #endif -#if 1 + init_timer(); /* Need to use TMICT to synconize FID/VID. */ + needs_reset |= optimize_link_coherent_ht(); needs_reset |= optimize_link_incoherent_ht(sysinfo); needs_reset |= mcp55_early_setup_x(); @@ -323,7 +322,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) print_info("ht reset -\n"); soft_reset(); } -#endif + allow_all_aps_stop(bsp_apicid); //It's the time to set ctrl in sysinfo now; @@ -331,9 +330,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enable_smbus(); /* enable in sio_setup */ - //do we need apci timer, tsc...., only debug need it for better output /* all ap stopped? */ -// init_timer(); // Need to use TMICT to synconize FID/VID sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); |