diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-09-19 09:47:16 -0600 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2016-09-20 21:55:12 +0200 |
commit | a5aad2ed68690d748c650f69a2e39f91a7b02608 (patch) | |
tree | 7ad419bc13bcf13e546481558aa1a4c923821c07 /src/mainboard/supermicro/h8dme/romstage.c | |
parent | 531b87ac4e8038aedf9c44c29fe2c1fc31adb346 (diff) |
src/mainboard/lenovo-winent: Add space around operators
Change-Id: Iab2a879ebdea9d93ef5eb7e3abf875036c1e1cb4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16641
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/supermicro/h8dme/romstage.c')
-rw-r--r-- | src/mainboard/supermicro/h8dme/romstage.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index aeff991355..d85ae5ba68 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -77,7 +77,7 @@ static void sio_setup(void) uint8_t byte; enable_smbus(); -// smbusx_write_byte(1, (0x58>>1), 0, 0x80); /* select bank0 */ +// smbusx_write_byte(1, (0x58 >> 1), 0, 0x80); /* select bank0 */ smbusx_write_byte(1, (0x58 >> 1), 0xb1, 0xff); /* set FAN ctrl to DC mode */ byte = pci_read_config8(PCI_DEV(0, MCP55_DEVN_BASE + 1, 0), 0x7b); @@ -94,8 +94,8 @@ static void sio_setup(void) } /* We have no idea where the SMBUS switch is. This doesn't do anything ATM. */ -#define RC0 (2<<8) -#define RC1 (1<<8) +#define RC0 (2 << 8) +#define RC1 (1 << 8) void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { |