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authorStefan Reinauer <stepan@coresystems.de>2010-04-27 06:56:47 +0000
committerStefan Reinauer <stepan@openbios.org>2010-04-27 06:56:47 +0000
commit14e22779625de673569c7b950ecc2753fb915b31 (patch)
tree14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/mainboard/supermicro/h8dme/devicetree.cb
parent0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff)
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/supermicro/h8dme/devicetree.cb')
-rw-r--r--src/mainboard/supermicro/h8dme/devicetree.cb32
1 files changed, 16 insertions, 16 deletions
diff --git a/src/mainboard/supermicro/h8dme/devicetree.cb b/src/mainboard/supermicro/h8dme/devicetree.cb
index 5d6776a3f2..f6f75efb65 100644
--- a/src/mainboard/supermicro/h8dme/devicetree.cb
+++ b/src/mainboard/supermicro/h8dme/devicetree.cb
@@ -8,9 +8,9 @@ chip northbridge/amd/amdk8/root_complex
chip northbridge/amd/amdk8 #mc0
device pci 18.0 on end
device pci 18.0 on end
- device pci 18.0 on
- # devices on link 0, link 0 == LDT 0
- chip southbridge/nvidia/mcp55
+ device pci 18.0 on
+ # devices on link 0, link 0 == LDT 0
+ chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT
device pci 1.0 on # LPC
chip superio/winbond/w83627hf
@@ -37,14 +37,14 @@ chip northbridge/amd/amdk8/root_complex
irq 0x70 = 1
irq 0x72 = 12
end
- device pnp 2e.6 off # SFI
+ device pnp 2e.6 off # SFI
io 0x62 = 0x100
end
device pnp 2e.7 off # GPIO_GAME_MIDI
io 0x60 = 0x220
io 0x62 = 0x300
irq 0x70 = 9
- end
+ end
device pnp 2e.8 off end # WDTO_PLED
device pnp 2e.9 off end # GPIO_SUSLED
device pnp 2e.a off end # ACPI
@@ -67,24 +67,24 @@ chip northbridge/amd/amdk8/root_complex
# end
# chip drivers/generic/generic #PCIXB Slot1
# device i2c 51 on end
-# end
+# end
# chip drivers/generic/generic #PCIXB Slot2
# device i2c 52 on end
-# end
+# end
# chip drivers/generic/generic #PCI Slot1
# device i2c 53 on end
-# end
+# end
# chip drivers/generic/generic #Master MCP55 PCI-E
# device i2c 54 on end
-# end
+# end
# chip drivers/generic/generic #Slave MCP55 PCI-E
# device i2c 55 on end
-# end
+# end
chip drivers/generic/generic #MAC EEPROM
device i2c 51 on end
end
- end # SM
+ end # SM
device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE
@@ -116,15 +116,15 @@ chip northbridge/amd/amdk8/root_complex
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_addr" = "0x51"
end
- end # device pci 18.0
+ end # device pci 18.0
device pci 18.1 on end
device pci 18.2 on end
device pci 18.3 on end
end # mc0
-
+
end # PCI domain
-
-# chip drivers/generic/debug
+
+# chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# device pnp 0.1 on end # pci_regs_all
# device pnp 0.2 off end # mem
@@ -135,5 +135,5 @@ chip northbridge/amd/amdk8/root_complex
# device pnp 0.7 off end # tsc
# device pnp 0.8 off end # io
# device pnp 0.9 on end # io
-# end
+# end
end #root_complex