diff options
author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2015-11-03 10:06:38 -0600 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-10 00:57:55 +0100 |
commit | 7c62e17f2ec201d4c0d3cbbf8454625f40d209ce (patch) | |
tree | 1094cff034296f10125c0f58ffa625190d7bf12d /src/mainboard/sunw/ultra40m2/cmos.layout | |
parent | d9247828fd6c7b299a5aee000c339c59d827a40d (diff) |
mainboard: Add Sun Ultra 40 M2 port
The Ultra 40 M2 is a dual Socket F workstation with MCP55/IO55 chipset,
DME1737 superio and onboard Firewire. This board port is for family
0Fh (K8) processors.
Due to existing bugs, having memory on the second node will cause
raminit to fail.
Change-Id: I5b62ade908ffeb80e22f14edbe4c1ec04880bd30
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/12304
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/sunw/ultra40m2/cmos.layout')
-rw-r--r-- | src/mainboard/sunw/ultra40m2/cmos.layout | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/sunw/ultra40m2/cmos.layout b/src/mainboard/sunw/ultra40m2/cmos.layout index 53f259ad5a..3dfdf3561f 100644 --- a/src/mainboard/sunw/ultra40m2/cmos.layout +++ b/src/mainboard/sunw/ultra40m2/cmos.layout @@ -25,7 +25,7 @@ entries 396 1 e 1 interleave_chip_selects 397 2 e 8 max_mem_clock 399 1 e 2 multi_core -400 1 e 1 power_on_after_fail +408 1 e 1 power_on_after_fail 412 4 e 6 debug_level 440 4 e 9 slow_cpu 444 1 e 1 nmi |