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authorSean Rhodes <sean@starlabs.systems>2022-05-26 20:52:41 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-07-05 13:05:22 +0000
commit2e21725fd5c8e65dcb1ffb898df7088b33455fff (patch)
tree69ce7b3ab2142aa9fc7027db857955cc900a2bf5 /src/mainboard/starlabs
parenta6accb580c15f79a9df69d3e0ffdbebe417bdb0c (diff)
mb/starlabs/labtop/tgl: Organise USB ports by hardware port
Group the USB ports by hardware ports, rather than separate USB 2.0 and 3.0 interfaces. This also removes usb3_port[2] as it is not connected and fixes the labelling of usb3_port[0] and usb3_port[1]. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I7923fc00c36687a7f89d863eb0ea4e01a036502d Reviewed-on: https://review.coreboot.org/c/coreboot/+/64703 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/starlabs')
-rw-r--r--src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb21
1 files changed, 8 insertions, 13 deletions
diff --git a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
index af6ba24599..cf886cb166 100644
--- a/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
+++ b/src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb
@@ -101,31 +101,26 @@ chip soc/intel/tigerlake
device pci 12.0 off end # Thermal Subsystem
device pci 12.6 off end # GSPI #2
device pci 14.0 on # USB xHCI
- ### USB 2.0 Devices
# Motherboard USB Type C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
+ register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
+
# Motherboard USB 3.0
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
+
# Daughterboard USB 3.0
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"
+ register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
+
# Internal Webcam
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"
+
# Daughterboard SD Card
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"
+
# Internal Bluetooth
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"
-
- ### USB 3.0 Devices
- # Motherboard USB Type C
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
- # Motherboard USB 3.0
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
- # Daughterboard USB 3.0
- register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"
-
- ### Thunderbolt 4.0 Devices
- # Motherboard Thunderbolt 4.0
- register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
end
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.2 on end # USB xDCI (OTG)