diff options
author | Sean Rhodes <sean@starlabs.systems> | 2022-05-19 15:35:31 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2022-06-20 20:09:40 +0000 |
commit | 57779955c9be64426e591557fe8571637028ddad (patch) | |
tree | 24503f839e3593236d4d8900abd9a5556b1bbd2a /src/mainboard/starlabs | |
parent | 3f205a416e89b3a105a5346fa2381b1675e859e5 (diff) |
soc/intel/apollolake: Hook Up SataPortEnable to devicetree
Hook Up SataPortsEnable to the devicetree. As the default value is 0,
set both [0] and [1] in all mainboards so they aren't affected.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ica8cf9484a6e6fe4362eabb8a9a59fcaf97c1bd3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64524
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/starlabs')
-rw-r--r-- | src/mainboard/starlabs/lite/variants/glk/devicetree.cb | 5 | ||||
-rw-r--r-- | src/mainboard/starlabs/lite/variants/glkr/devicetree.cb | 5 |
2 files changed, 8 insertions, 2 deletions
diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb index 1c23eec44d..303ba5ff5b 100644 --- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb @@ -78,7 +78,10 @@ chip soc/intel/apollolake device pci 0f.1 on end # Heci2 device pci 0f.2 on end # Heci3 device pci 11.0 off end # ISH - device pci 12.0 on end # SATA + device pci 12.0 on # SATA + register "SataPortsEnable[0]" = "1" + register "SataPortsEnable[1]" = "1" + end device pci 13.0 off end # PCIe-A 0 Slot 1 device pci 13.1 off end # PCIe-A 1 device pci 13.2 off end # PCIe-A 2 Onboard Lan diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb index aad20ea8f6..150ab57d47 100644 --- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb @@ -78,7 +78,10 @@ chip soc/intel/apollolake device pci 0f.1 on end # Heci2 device pci 0f.2 on end # Heci3 device pci 11.0 off end # ISH - device pci 12.0 on end # SATA + device pci 12.0 on # SATA + register "SataPortsEnable[0]" = "1" + register "SataPortsEnable[1]" = "1" + end device pci 13.0 off end # PCIe-A 0 Slot 1 device pci 13.1 off end # PCIe-A 1 device pci 13.2 off end # PCIe-A 2 Onboard Lan |