diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2022-05-30 10:59:20 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-20 12:11:37 +0000 |
| commit | 3ae95b26304cc1affddf4ebda218247765c93ea2 (patch) | |
| tree | ed8a9b9b04d13e4298ca90729b4fc4c23fdb35db /src/mainboard/starlabs | |
| parent | b02c90d146f4929acdee0f28e4c0ddd545ffdb04 (diff) | |
mb/starlabs/lite/glk: Organise USB ports by hardware port
Group the USB ports by hardware ports, rather than separate USB 2.0 and
3.0 interfaces.
This change also corrects the daughterboard USB 3.0 port number.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ib6a934a1e5e65fe387c63b78cbe80e45e97e0a8b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64796
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/starlabs')
| -rw-r--r-- | src/mainboard/starlabs/lite/variants/glk/devicetree.cb | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb index bc878ef796..1c23eec44d 100644 --- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb @@ -86,25 +86,23 @@ chip soc/intel/apollolake device pci 14.0 off end # PCIe-B 0 Slot2 device pci 14.1 off end # PCIe-B 1 Onboard M2 Slot(Wifi/BT) device pci 15.0 on # XHCI - ### USB 2.0 Devices # Motherboard USB Type C register "usb2_port[0]" = "PORT_EN(OC_SKIP)" + register "usb3_port[1]" = "PORT_EN(OC_SKIP)" + # Bluetooth register "usb2_port[2]" = "PORT_EN(OC_SKIP)" + # Motherboard USB 3.0 register "usb2_port[3]" = "PORT_EN(OC1)" + register "usb3_port[0]" = "PORT_EN(OC1)" + # Daughterboard USB 3.0 register "usb2_port[5]" = "PORT_EN(OC_SKIP)" + register "usb3_port[4]" = "PORT_EN(OC_SKIP)" + # Daughterboard SD Card register "usb2_port[6]" = "PORT_EN(OC_SKIP)" - - ### USB 3.0 Devices - # Motherboard USB 3.0 - register "usb3_port[0]" = "PORT_EN(OC1)" - # Motherboard USB Type C - register "usb3_port[1]" = "PORT_EN(OC_SKIP)" - # Daughterboard USB 3.0 - register "usb3_port[2]" = "PORT_EN(OC_SKIP)" end device pci 15.1 off end # XDCI device pci 16.0 off end # I2C0 |