diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2023-09-21 09:27:47 +0100 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-10-24 15:39:33 +0000 |
| commit | 8902dfa2bdf33b8ae69fa0d5161b28f67f8c0881 (patch) | |
| tree | 6b4779cd8c2813893b14dd793cbeb40f96e7ee8b /src/mainboard/starlabs/starbook | |
| parent | 53f4cafccadfab8147a0f9978aa608aedf9646df (diff) | |
mb/starlabs/starbook/{adl,rpl}: Disable GpioOverride
Disable the GpioOverride UPD in FSP M, and comment out the Clock Request
GPIOs to ensure that coreboot doesn't touch them.
This solves behaviour that can only be described as weird:
* Devices connected to Root Ports don't initialise
* Hang seen when entering S5
* Hang when edk2 is reached
Change-Id: Idf8d2112a1c44064af73bb54fd3e1a1a429e0649
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78199
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/starlabs/starbook')
4 files changed, 10 insertions, 8 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/adl/gpio.c b/src/mainboard/starlabs/starbook/variants/adl/gpio.c index b7c9a8ff34..988e6defb7 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl/gpio.c @@ -209,11 +209,11 @@ const struct pad_config gpio_table[] = { /* D5: Not Connected */ PAD_NC(GPP_D5, NONE), /* D6: Clock Request 1 PCH M.2 SSD */ - PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), +// PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), /* D7: Clock Request 2 Wireless LAN */ - PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), +// PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), /* D8: Clock Request 3 LAN */ - PAD_NC(GPP_D8, NONE), +// PAD_NC(GPP_D8, NONE), /* D9: GSPI 2 FPS */ PAD_NC(GPP_D9, NONE), /* D10: GSPI 2 Clock */ @@ -374,7 +374,7 @@ const struct pad_config gpio_table[] = { /* H18: CPI C10 Gate */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* H19: Clock Request 4 CPU M.2 SSD */ - PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), +// PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), /* H20: Not Connected */ PAD_NC(GPP_H20, NONE), /* H21: Not Connected */ diff --git a/src/mainboard/starlabs/starbook/variants/adl/romstage.c b/src/mainboard/starlabs/starbook/variants/adl/romstage.c index 17629b460d..81f1ef3272 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/adl/romstage.c @@ -35,4 +35,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mupd->FspmConfig.PcieRpEnableMask &= ~(1 << 4); mupd->FspmConfig.DmiMaxLinkSpeed = 4; + mupd->FspmConfig.GpioOverride = 0; }; diff --git a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c index aba6dc8875..4b4f9ed91c 100644 --- a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c @@ -209,11 +209,11 @@ const struct pad_config gpio_table[] = { /* D5: Not Connected */ PAD_NC(GPP_D5, NONE), /* D6: Clock Request 1 PCH M.2 SSD */ - PAD_NC(GPP_D6, NONE), +// PAD_NC(GPP_D6, NONE), /* D7: Clock Request 2 Wireless LAN */ - PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), +// PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), /* D8: Clock Request 3 LAN */ - PAD_NC(GPP_D8, NONE), +// PAD_NC(GPP_D8, NONE), /* D9: GSPI 2 FPS */ PAD_NC(GPP_D9, NONE), /* D10: GSPI 2 Clock */ @@ -374,7 +374,7 @@ const struct pad_config gpio_table[] = { /* H18: CPI C10 Gate */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* H19: Clock Request 4 CPU M.2 SSD */ - PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), +// PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), /* H20: Not Connected */ PAD_NC(GPP_H20, NONE), /* H21: Not Connected */ diff --git a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c index e7e1c6a3d2..085dbfcabb 100644 --- a/src/mainboard/starlabs/starbook/variants/rpl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/rpl/romstage.c @@ -44,4 +44,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) } mupd->FspmConfig.DmiMaxLinkSpeed = 4; + mupd->FspmConfig.GpioOverride = 0; }; |